clock-names = "wdt";
};
+ pci_intc: interrupt-controller@18060018 {
+ compatible = "qca,ar7100-misc-intc";
+ reg = <0x18060018 0x4>;
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
rst: reset-controller@18060024 {
compatible = "qca,ar7100-reset";
#reset-cells = <1>;
};
- pcie0: pcie-controller@180c0000 {
+ pcie0: pcie-controller@17010000 {
compatible = "qca,ar7100-pci";
#address-cells = <3>;
#size-cells = <2>;
reg-names = "cfg_base";
ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 /* pci memory */
0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
- interrupt-parent = <&cpuintc>;
- interrupts = <2>;
- interrupt-controller;
+ interrupt-parent = <&pci_intc>;
+ interrupts = <4>;
+
#interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 1>;
- interrupt-map = <0 0 0 0 &pcie0 0>;
+ interrupt-map-mask = <0xf800 0 0 0>;
+ interrupt-map = <0x8800 0 0 0 &pci_intc 0
+ 0x9000 0 0 0 &pci_intc 1
+ 0x9800 0 0 0 &pci_intc 2>;
+
status = "disabled";
};
};
};
ð0 {
- compatible = "qca,ar7100-eth";
+ compatible = "qca,ar7100-eth", "syscon";
reg = <0x19000000 0x200
0x18070000 0x4>;
resets = <&rst 9>;
reset-names = "mac";
+ qca,mac-idx = <0>;
};
&mdio1 {
};
ð1 {
- compatible = "qca,ar7100-eth";
+ compatible = "qca,ar7100-eth", "syscon";
reg = <0x1a000000 0x200
0x18070004 0x4>;
resets = <&rst 13>;
reset-names = "mac";
+ qca,mac-idx = <1>;
};