// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include <dt-bindings/clock/ath79-clk.h>
+
#include "ath79.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ serial0 = &uart;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
bootargs = "console=ttyATH0,115200";
};
+ ref: ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-output-names = "ref";
+ };
+
ahb {
apb {
ddr_ctrl: memory-controller@18000000 {
clocks = <&pll ATH79_CLK_REF>;
clock-names = "uart";
-
- status = "disabled";
};
gpio: gpio@18040000 {
compatible = "qca,ar7100-gpio";
- reg = <0x18040000 0x34>;
+ reg = <0x18040000 0x28>;
interrupts = <2>;
ngpios = <30>;
interrupt-controller;
#interrupt-cells = <2>;
-
- status = "disabled";
};
pinmux: pinmux@18040028 {
compatible = "qca,ar9330-pll";
reg = <0x18050000 0x100>;
+ clocks = <&ref>;
+ clock-names = "ref";
+
#clock-cells = <1>;
+ clock-output-names = "cpu", "ddr", "ahb";
};
wdt: wdt@18060008 {
phys = <&usb_phy>;
status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub_port: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
};
spi: spi@1f000000 {
- compatible = "qca,ar7100-spi";
- reg = <0x1f000000 0x10>;
+ compatible = "qca,ar934x-spi";
+ reg = <0x1f000000 0x1c>;
clocks = <&pll ATH79_CLK_AHB>;
- clock-names = "ahb";
#address-cells = <1>;
#size-cells = <0>;
resets = <&rst 9>;
reset-names = "mac";
- phy-mode = "mii";
phy-handle = <&swphy4>;
};