#include <linux/pm_domain.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>
+#include <linux/version.h>
-/* MTU */
-#define ENETSW_TAG_SIZE (6 + VLAN_HLEN)
-#define ENETSW_MTU_OVERHEAD (VLAN_ETH_HLEN + VLAN_HLEN + \
- ENETSW_TAG_SIZE)
+/* TODO: Bigger frames may work but we do not trust that they are safe on all
+ * platforms so more research is needed, a max frame size of 2048 has been
+ * tested. We use the safe frame size 1542 which is 1532 plus DSA and VLAN
+ * overhead.
+ */
+#define ENETSW_MAX_FRAME 1542
+#define ENETSW_DSA_TAG_SIZE 6
+/* The MTU in Linux does not include ethernet or VLAN headers, but it DOES
+ * include the DSA overhead (the framework will increase the MTU to fit
+ * any DSA header).
+ */
+#define ENETSW_MAX_MTU (ENETSW_MAX_FRAME - VLAN_ETH_HLEN - \
+ VLAN_HLEN)
#define ENETSW_FRAG_SIZE(x) (SKB_DATA_ALIGN(NET_SKB_PAD + x + \
SKB_DATA_ALIGN(sizeof(struct skb_shared_info))))
/* number of dma desc in tx ring */
int tx_ring_size;
- /* maximum dma burst size */
- int dma_maxburst;
-
/* cpu view of rx dma ring */
struct bcm6368_enetsw_desc *tx_desc_cpu;
/* platform device reference */
struct platform_device *pdev;
-
- /* dma channel enable mask */
- u32 dma_chan_en_mask;
-
- /* dma channel interrupt mask */
- u32 dma_chan_int_mask;
-
- /* dma channel width */
- unsigned int dma_chan_width;
};
static inline void dma_writel(struct bcm6368_enetsw *priv, u32 val, u32 off)
static inline u32 dma_readl(struct bcm6368_enetsw *priv, u32 off, int chan)
{
- return __raw_readl(priv->dma_chan + off + chan * priv->dma_chan_width);
+ return __raw_readl(priv->dma_chan + off + chan * DMA_CHAN_WIDTH);
}
-static inline void dmac_writel(struct bcm6368_enetsw *priv, u32 val,
- u32 off, int chan)
+static inline void dmac_writel(struct bcm6368_enetsw *priv, u32 val, u32 off,
+ int chan)
{
- __raw_writel(val, priv->dma_chan + off + chan * priv->dma_chan_width);
+ __raw_writel(val, priv->dma_chan + off + chan * DMA_CHAN_WIDTH);
}
static inline void dmas_writel(struct bcm6368_enetsw *priv, u32 val,
u32 off, int chan)
{
- __raw_writel(val, priv->dma_sram + off + chan * priv->dma_chan_width);
+ __raw_writel(val, priv->dma_sram + off + chan * DMA_CHAN_WIDTH);
}
/*
bcm6368_enetsw_refill_rx(ndev, true);
/* kick rx dma */
- dmac_writel(priv, priv->dma_chan_en_mask,
+ dmac_writel(priv, DMAC_CHANCFG_EN_MASK,
DMAC_CHANCFG_REG, priv->rx_chan);
}
int rx_work_done;
/* ack interrupts */
- dmac_writel(priv, priv->dma_chan_int_mask,
+ dmac_writel(priv, DMAC_IR_PKTDONE_MASK,
DMAC_IR_REG, priv->rx_chan);
- dmac_writel(priv, priv->dma_chan_int_mask,
+ dmac_writel(priv, DMAC_IR_PKTDONE_MASK,
DMAC_IR_REG, priv->tx_chan);
/* reclaim sent skb */
napi_complete_done(napi, rx_work_done);
/* restore rx/tx interrupt */
- dmac_writel(priv, priv->dma_chan_int_mask,
- DMAC_IRMASK_REG, priv->rx_chan);
- dmac_writel(priv, priv->dma_chan_int_mask,
- DMAC_IRMASK_REG, priv->tx_chan);
+ dmac_writel(priv, DMAC_IR_PKTDONE_MASK,
+ DMAC_IRMASK_REG, priv->rx_chan);
+ dmac_writel(priv, DMAC_IR_PKTDONE_MASK,
+ DMAC_IRMASK_REG, priv->tx_chan);
return rx_work_done;
}
netdev_sent_queue(ndev, skb->len);
/* kick tx dma */
- dmac_writel(priv, priv->dma_chan_en_mask, DMAC_CHANCFG_REG,
+ dmac_writel(priv, DMAC_CHANCFG_EN_MASK, DMAC_CHANCFG_REG,
priv->tx_chan);
/* stop queue if no more desc available */
dmas_writel(priv, 0, DMAS_SRAM4_REG, priv->tx_chan);
/* set dma maximum burst len */
- dmac_writel(priv, priv->dma_maxburst,
+ dmac_writel(priv, ENETSW_DMA_MAXBURST,
DMAC_MAXBURST_REG, priv->rx_chan);
- dmac_writel(priv, priv->dma_maxburst,
+ dmac_writel(priv, ENETSW_DMA_MAXBURST,
DMAC_MAXBURST_REG, priv->tx_chan);
/* set flow control low/high threshold to 1/3 / 2/3 */
static int bcm6368_enetsw_probe(struct platform_device *pdev)
{
- struct bcm6368_enetsw *priv;
struct device *dev = &pdev->dev;
struct device_node *node = dev->of_node;
+ struct bcm6368_enetsw *priv;
struct net_device *ndev;
struct resource *res;
+ unsigned char dev_addr[ETH_ALEN];
unsigned i;
+ int num_resets;
int ret;
- ndev = alloc_etherdev(sizeof(*priv));
+ ndev = devm_alloc_etherdev(dev, sizeof(*priv));
if (!ndev)
return -ENOMEM;
+ platform_set_drvdata(pdev, ndev);
+ SET_NETDEV_DEV(ndev, dev);
+
priv = netdev_priv(ndev);
+ priv->pdev = pdev;
+ priv->net_dev = ndev;
priv->num_pms = of_count_phandle_with_args(node, "power-domains",
"#power-domain-cells");
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
priv->dma_base = devm_ioremap_resource(dev, res);
- if (IS_ERR(priv->dma_base))
+ if (IS_ERR_OR_NULL(priv->dma_base))
return PTR_ERR(priv->dma_base);
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"dma-channels");
priv->dma_chan = devm_ioremap_resource(dev, res);
- if (IS_ERR(priv->dma_chan))
+ if (IS_ERR_OR_NULL(priv->dma_chan))
return PTR_ERR(priv->dma_chan);
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma-sram");
priv->dma_sram = devm_ioremap_resource(dev, res);
- if (IS_ERR(priv->dma_sram))
+ if (IS_ERR_OR_NULL(priv->dma_sram))
return PTR_ERR(priv->dma_sram);
priv->irq_rx = platform_get_irq_byname(pdev, "rx");
priv->rx_ring_size = ENETSW_DEF_RX_DESC;
priv->tx_ring_size = ENETSW_DEF_TX_DESC;
-
- priv->dma_maxburst = ENETSW_DMA_MAXBURST;
-
priv->copybreak = ENETSW_DEF_CPY_BREAK;
- priv->dma_chan_en_mask = DMAC_CHANCFG_EN_MASK;
- priv->dma_chan_int_mask = DMAC_IR_PKTDONE_MASK;
- priv->dma_chan_width = DMA_CHAN_WIDTH;
-
- of_get_mac_address(node, ndev->dev_addr);
- if (is_valid_ether_addr(ndev->dev_addr)) {
- dev_info(dev, "mtd mac %pM\n", ndev->dev_addr);
+ of_get_mac_address(node, dev_addr);
+ if (is_valid_ether_addr(dev_addr)) {
+ dev_addr_set(ndev, dev_addr);
+ dev_info(dev, "mtd mac %pM\n", dev_addr);
} else {
- random_ether_addr(ndev->dev_addr);
- dev_info(dev, "random mac %pM\n", ndev->dev_addr);
+ eth_hw_addr_random(ndev);
+ dev_info(dev, "random mac\n");
}
- priv->rx_buf_size = ALIGN(ndev->mtu + ENETSW_MTU_OVERHEAD,
- priv->dma_maxburst * 4);
+ priv->rx_buf_size = ALIGN(ENETSW_MAX_FRAME,
+ ENETSW_DMA_MAXBURST * 4);
priv->rx_frag_size = ENETSW_FRAG_SIZE(priv->rx_buf_size);
if (priv->num_clocks) {
priv->clock = devm_kcalloc(dev, priv->num_clocks,
sizeof(struct clk *), GFP_KERNEL);
- if (!priv->clock)
- return -ENOMEM;
+ if (IS_ERR_OR_NULL(priv->clock))
+ return PTR_ERR(priv->clock);
}
for (i = 0; i < priv->num_clocks; i++) {
priv->clock[i] = of_clk_get(node, i);
if (IS_ERR(priv->clock[i])) {
dev_err(dev, "error getting clock %d\n", i);
- return -EINVAL;
+ return PTR_ERR(priv->clock[i]);
}
ret = clk_prepare_enable(priv->clock[i]);
}
}
- priv->num_resets = of_count_phandle_with_args(node, "resets",
- "#reset-cells");
+ num_resets = of_count_phandle_with_args(node, "resets",
+ "#reset-cells");
+ if (num_resets > 0)
+ priv->num_resets = num_resets;
+ else
+ priv->num_resets = 0;
if (priv->num_resets) {
priv->reset = devm_kcalloc(dev, priv->num_resets,
sizeof(struct reset_control *),
GFP_KERNEL);
- if (!priv->reset)
- return -ENOMEM;
+ if (IS_ERR_OR_NULL(priv->reset))
+ return PTR_ERR(priv->reset);
}
for (i = 0; i < priv->num_resets; i++) {
priv->reset[i] = devm_reset_control_get_by_index(dev, i);
if (IS_ERR(priv->reset[i])) {
dev_err(dev, "error getting reset %d\n", i);
- return -EINVAL;
+ return PTR_ERR(priv->reset[i]);
}
ret = reset_control_reset(priv->reset[i]);
/* register netdevice */
ndev->netdev_ops = &bcm6368_enetsw_ops;
ndev->min_mtu = ETH_ZLEN;
- ndev->mtu = ETH_DATA_LEN + ENETSW_TAG_SIZE;
- ndev->max_mtu = ETH_DATA_LEN + ENETSW_TAG_SIZE;
+ ndev->mtu = ETH_DATA_LEN;
+ ndev->max_mtu = ENETSW_MAX_MTU;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0)
+ netif_napi_add(ndev, &priv->napi, bcm6368_enetsw_poll);
+#else
netif_napi_add(ndev, &priv->napi, bcm6368_enetsw_poll, 16);
- SET_NETDEV_DEV(ndev, dev);
+#endif
- ret = register_netdev(ndev);
- if (ret)
+ ret = devm_register_netdev(dev, ndev);
+ if (ret) {
+ netif_napi_del(&priv->napi);
goto out_disable_clk;
+ }
netif_carrier_off(ndev);
- platform_set_drvdata(pdev, ndev);
- priv->pdev = pdev;
- priv->net_dev = ndev;
+
+ dev_info(dev, "%s at 0x%px, IRQ %d\n", ndev->name, priv->dma_base, ndev->irq);
return 0;
struct bcm6368_enetsw *priv = netdev_priv(ndev);
unsigned int i;
- unregister_netdev(ndev);
-
pm_runtime_put_sync(dev);
for (i = 0; priv->pm && i < priv->num_pms; i++) {
dev_pm_domain_detach(priv->pm[i], true);
for (i = 0; i < priv->num_clocks; i++)
clk_disable_unprepare(priv->clock[i]);
- free_netdev(ndev);
-
return 0;
}
.remove = bcm6368_enetsw_remove,
};
module_platform_driver(bcm6368_enetsw_driver);
+
+MODULE_AUTHOR("Álvaro Fernández Rojas <noltari@gmail.com>");
+MODULE_DESCRIPTION("BCM6368 Ethernet Switch Controller Driver");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:bcm6368-enetsw");
projects / openwrt / openwrt.git / blobdiff