brcm63xx: register interrupt-controllers through DT when possible
[openwrt/svn-archive/archive.git] / target / linux / brcm63xx / dts / bcm6358.dtsi
index b376cf01f33fb9a793cd979a8116652005664970..a4af2144a8dcaf1ecbcc794d4b17e5f914a0a2ec 100644 (file)
                };
        };
 
+       cpu_intc: interrupt-controller {
+               #address-cells = <0>;
+               compatible = "mti,cpu-interrupt-controller";
+
+               interrupt-controller;
+               #interrupt-cells = <1>;
+       };
+
        memory { device_type = "memory"; reg = <0 0>; };
 
        pflash: nor@1e000000 {
                #size-cells = <1>;
                ranges;
                compatible = "simple-bus";
+
+               periph_intc: interrupt-controller@fffe000c {
+                       compatible = "brcm,bcm6345-l2-intc";
+                       reg = <0xfffe000c 0x8>,
+                             <0xfffe0038 0x8>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+
+                       interrupt-parent = <&cpu_intc>;
+                       interrupts = <2>, <3>;
+               };
+
+               ext_intc0: interrupt-controller@fffe0014 {
+                       compatible = "brcm,bcm6345-ext-intc";
+                       reg = <0xfffe0014 0x4>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <25>, <26>, <27>, <28>;
+               };
+
+               ext_intc1: interrupt-controller@fffe001c {
+                       compatible = "brcm,bcm6345-ext-intc";
+                       reg = <0xfffe001c 0x4>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <20>, <21>;
+               };
        };
 };