ct = gc->chip_types;
ct->type = IRQ_TYPE_EDGE_FALLING;
ct->regs.ack = GPIO_INTERRUPT_CLEAR;
- ct->regs.enable = GPIO_INTERRUPT_ENABLE;
ct->chip.irq_ack = irq_gc_ack_set_bit;
- ct->chip.irq_enable = irq_gc_unmask_enable_reg;
- ct->chip.irq_disable = irq_gc_mask_disable_reg;
+ ct->regs.mask = GPIO_INTERRUPT_ENABLE;
+ ct->chip.irq_enable = irq_gc_mask_set_bit;
+ ct->chip.irq_disable = irq_gc_mask_clr_bit;
ct->chip.irq_set_type = cns3xxx_gpio_irq_set_type;
ct->handler = handle_edge_irq;