cns3xxx: update patches for 4.14

[openwrt/openwrt.git] / target / linux / cns3xxx / patches-4.14 / 210-dwc2_defaults.patch

diff --git a/target/linux/cns3xxx/patches-4.14/210-dwc2_defaults.patch b/target/linux/cns3xxx/patches-4.14/210-dwc2_defaults.patch
index 9cd05eac6a76c48e2560f21d043eb6a860a32262..67f152f43de1f7f57cdf998c3ff038a0af439045 100644 (file)
--- a/target/linux/cns3xxx/patches-4.14/210-dwc2_defaults.patch
+++ b/target/linux/cns3xxx/patches-4.14/210-dwc2_defaults.patch
@@ -1,47 +1,63 @@
---- a/drivers/usb/dwc2/platform.c
-+++ b/drivers/usb/dwc2/platform.c
-@@ -308,6 +308,34 @@ static int __dwc2_lowlevel_hw_enable(str
-       return ret;
+--- a/drivers/usb/dwc2/params.c
++++ b/drivers/usb/dwc2/params.c
+@@ -136,6 +136,36 @@ static void dwc2_set_stm32f4x9_fsotg_par
+       p->activate_stm_fs_transceiver = true;
  }
  
-+static const struct dwc2_core_params params_cns3xxx = {
-+      .otg_cap                        = 2,    /* non-HNP/non-SRP capable */
-+      .otg_ver                        = 0,    /* 1.3 */
-+      .dma_enable                     = 1,
-+      .dma_desc_enable                = 0,
-+      .speed                          = 0,    /* High Speed */
-+      .enable_dynamic_fifo            = 1,
-+      .en_multiple_tx_fifo            = 1,
-+      .host_rx_fifo_size              = 658,  /* 774 DWORDs */
-+      .host_nperio_tx_fifo_size       = 128,  /* 256 DWORDs */
-+      .host_perio_tx_fifo_size        = 658,  /* 512 DWORDs */
-+      .max_transfer_size              = 65535,
-+      .max_packet_count               = 511,
-+      .host_channels                  = 16,
-+      .phy_type                       = 1,    /* UTMI */
-+      .phy_utmi_width                 = 16,   /* 8 bits */
-+      .phy_ulpi_ddr                   = 0,    /* Single */
-+      .phy_ulpi_ext_vbus              = 0,
-+      .i2c_enable                     = 0,
-+      .ulpi_fs_ls                     = 0,
-+      .host_support_fs_ls_low_power   = 0,
-+      .host_ls_low_power_phy_clk      = 0,    /* 48 MHz */
-+      .ts_dline                       = 0,
-+      .reload_ctl                     = 0,
-+      .ahbcfg                         = 0x10,
-+      .uframe_sched                   = 0,
-+};
++static void dwc2_set_cns3xxx_params(struct dwc2_hsotg *hsotg)
++{
++      struct dwc2_core_params *p = &hsotg->params;
 +
- /**
-  * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
-  * @hsotg: The driver state
-@@ -552,6 +580,9 @@ static int dwc2_driver_probe(struct plat
-               /* Default all params to autodetect */
-               dwc2_set_all_params(&defparams, -1);
-               params = &defparams;
-+#ifdef CONFIG_ARCH_CNS3XXX
-+              params = &params_cns3xxx;
-+#endif
++      p->otg_cap                      = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;    /* non-HNP/non-SRP capable */
++      p->host_dma                     = 1;
++      p->dma_desc_enable              = 0;
++      p->speed                        = DWC2_SPEED_PARAM_HIGH;        /* High Speed */
++      p->enable_dynamic_fifo          = 1;
++      p->en_multiple_tx_fifo          = 1;
++      p->host_rx_fifo_size            = 658;  /* 774 DWORDs */
++      p->host_nperio_tx_fifo_size     = 128;  /* 256 DWORDs */
++      p->host_perio_tx_fifo_size      = 658;  /* 512 DWORDs */
++      p->max_transfer_size            = 65535,
++      p->max_packet_count             = 511;
++      p->host_channels                = 16;
++      p->phy_type                     = DWC2_PHY_TYPE_PARAM_UTMI;     /* UTMI */
++      p->phy_utmi_width               = 16;   /* 8 bits */
++      p->phy_ulpi_ddr                 = 0;    /* Single */
++      p->phy_ulpi_ext_vbus            = 0;
++      p->i2c_enable                   = 0;
++      p->ulpi_fs_ls                   = 0;
++      p->host_support_fs_ls_low_power = 0;
++      p->host_ls_low_power_phy_clk    = 0;    /* 48 MHz */
++      p->ts_dline                     = 0;
++      p->reload_ctl                   = 0;
++      p->ahbcfg                       = 0x10;
++      p->uframe_sched                 = false;
++}
++
+ const struct of_device_id dwc2_of_match_table[] = {
+       { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
+       { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params  },
+@@ -710,17 +740,23 @@ int dwc2_get_hwparams(struct dwc2_hsotg
+ 
+ int dwc2_init_params(struct dwc2_hsotg *hsotg)
+ {
++      /*
+       const struct of_device_id *match;
+       void (*set_params)(void *data);
++      */
+ 
+       dwc2_set_default_params(hsotg);
+       dwc2_get_device_properties(hsotg);
+ 
++      /*
+       match = of_match_device(dwc2_of_match_table, hsotg->dev);
+       if (match && match->data) {
+               set_params = match->data;
+               set_params(hsotg);
+       }
++      */
++
++      dwc2_set_cns3xxx_params(hsotg);
+ 
+       dwc2_check_params(hsotg);
  
-               /*
-                * Disable descriptor dma mode by default as the HW can support