--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -862,8 +862,8 @@ static inline int mtk_max_buf_size(int f
+@@ -863,8 +863,8 @@ static inline int mtk_max_buf_size(int f
return buf_size;
}
{
rxd->rxd2 = READ_ONCE(dma_rxd->rxd2);
if (!(rxd->rxd2 & RX_DMA_DONE))
-@@ -872,6 +872,10 @@ static inline bool mtk_rx_get_desc(struc
+@@ -873,6 +873,10 @@ static inline bool mtk_rx_get_desc(struc
rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
return true;
}
-@@ -905,7 +909,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -917,7 +921,7 @@ static int mtk_init_fq_dma(struct mtk_et
phy_ring_tail = eth->phy_scratch_ring + soc->txrx.txd_size * (cnt - 1);
for (i = 0; i < cnt; i++) {
txd = (void *)eth->scratch_ring + i * soc->txrx.txd_size;
txd->txd1 = dma_addr + i * MTK_QDMA_PAGE_SIZE;
-@@ -915,6 +919,12 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -927,6 +931,12 @@ static int mtk_init_fq_dma(struct mtk_et
txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
txd->txd4 = 0;
}
mtk_w32(eth, eth->phy_scratch_ring, soc->reg_map->qdma.fq_head);
-@@ -1018,10 +1028,12 @@ static void setup_tx_buf(struct mtk_eth
+@@ -1030,10 +1040,12 @@ static void setup_tx_buf(struct mtk_eth
}
}
u32 data;
WRITE_ONCE(desc->txd1, info->addr);
-@@ -1045,6 +1057,59 @@ static void mtk_tx_set_dma_desc(struct n
+@@ -1057,6 +1069,59 @@ static void mtk_tx_set_dma_desc(struct n
WRITE_ONCE(desc->txd4, data);
}
static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
int tx_num, struct mtk_tx_ring *ring, bool gso)
{
-@@ -1053,6 +1118,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1065,6 +1130,7 @@ static int mtk_tx_map(struct sk_buff *sk
.gso = gso,
.csum = skb->ip_summed == CHECKSUM_PARTIAL,
.vlan = skb_vlan_tag_present(skb),
.vlan_tci = skb_vlan_tag_get(skb),
.first = true,
.last = !skb_is_nonlinear(skb),
-@@ -1112,7 +1178,9 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1124,7 +1190,9 @@ static int mtk_tx_map(struct sk_buff *sk
}
memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 &&
!(frag_size - txd_info.size);
txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag,
-@@ -1193,17 +1261,16 @@ err_dma:
+@@ -1205,17 +1273,16 @@ err_dma:
return -ENOMEM;
}
}
} else {
nfrags += skb_shinfo(skb)->nr_frags;
-@@ -1255,7 +1322,7 @@ static netdev_tx_t mtk_start_xmit(struct
+@@ -1267,7 +1334,7 @@ static netdev_tx_t mtk_start_xmit(struct
if (unlikely(test_bit(MTK_RESETTING, ð->state)))
goto drop;
if (unlikely(atomic_read(&ring->free_count) <= tx_num)) {
netif_stop_queue(dev);
netif_err(eth, tx_queued, dev,
-@@ -1347,7 +1414,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1359,7 +1426,7 @@ static int mtk_poll_rx(struct napi_struc
int idx;
struct sk_buff *skb;
u8 *data, *new_data;
int done = 0, bytes = 0;
while (done < budget) {
-@@ -1355,7 +1422,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1367,7 +1434,7 @@ static int mtk_poll_rx(struct napi_struc
unsigned int pktlen;
dma_addr_t dma_addr;
u32 hash, reason;
ring = mtk_get_rx_ring(eth);
if (unlikely(!ring))
-@@ -1365,16 +1432,15 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1377,16 +1444,15 @@ static int mtk_poll_rx(struct napi_struc
rxd = (void *)ring->dma + idx * eth->soc->txrx.rxd_size;
data = ring->data[idx];
if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
!eth->netdev[mac]))
-@@ -1417,7 +1483,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1432,7 +1498,7 @@ static int mtk_poll_rx(struct napi_struc
pktlen = RX_DMA_GET_PLEN0(trxd.rxd2);
skb->dev = netdev;
skb_put(skb, pktlen);
skb->ip_summed = CHECKSUM_UNNECESSARY;
else
skb_checksum_none_assert(skb);
-@@ -1435,10 +1501,25 @@ static int mtk_poll_rx(struct napi_struc
+@@ -1450,10 +1516,25 @@ static int mtk_poll_rx(struct napi_struc
mtk_ppe_check_skb(eth->ppe, skb,
trxd.rxd4 & MTK_RXD4_FOE_ENTRY);
skb_record_rx_queue(skb, 0);
napi_gro_receive(napi, skb);
-@@ -1450,7 +1531,7 @@ release_desc:
+@@ -1465,7 +1546,7 @@ release_desc:
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
rxd->rxd2 = RX_DMA_LSO;
else
ring->calc_idx = idx;
-@@ -1652,7 +1733,8 @@ static int mtk_napi_rx(struct napi_struc
+@@ -1667,7 +1748,8 @@ static int mtk_napi_rx(struct napi_struc
do {
int rx_done;
rx_done = mtk_poll_rx(napi, budget - rx_done_total, eth);
rx_done_total += rx_done;
-@@ -1666,10 +1748,11 @@ static int mtk_napi_rx(struct napi_struc
+@@ -1681,10 +1763,11 @@ static int mtk_napi_rx(struct napi_struc
if (rx_done_total == budget)
return budget;
return rx_done_total;
}
-@@ -1679,7 +1762,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1694,7 +1777,7 @@ static int mtk_tx_alloc(struct mtk_eth *
const struct mtk_soc_data *soc = eth->soc;
struct mtk_tx_ring *ring = ð->tx_ring;
int i, sz = soc->txrx.txd_size;
ring->buf = kcalloc(MTK_DMA_SIZE, sizeof(*ring->buf),
GFP_KERNEL);
-@@ -1699,13 +1782,19 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -1714,13 +1797,19 @@ static int mtk_tx_alloc(struct mtk_eth *
txd->txd2 = next_ptr;
txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
txd->txd4 = 0;
ring->dma_pdma = dma_alloc_coherent(eth->dma_dev, MTK_DMA_SIZE * sz,
&ring->phys_pdma, GFP_KERNEL);
if (!ring->dma_pdma)
-@@ -1785,13 +1874,11 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1800,13 +1889,11 @@ static int mtk_rx_alloc(struct mtk_eth *
struct mtk_rx_ring *ring;
int rx_data_len, rx_dma_size;
int i;
} else {
ring = ð->rx_ring[ring_no];
}
-@@ -1824,7 +1911,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1842,7 +1929,7 @@ static int mtk_rx_alloc(struct mtk_eth *
return -ENOMEM;
for (i = 0; i < rx_dma_size; i++) {
dma_addr_t dma_addr = dma_map_single(eth->dma_dev,
ring->data[i] + NET_SKB_PAD + eth->ip_align,
-@@ -1839,26 +1926,47 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -1857,26 +1944,47 @@ static int mtk_rx_alloc(struct mtk_eth *
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
rxd->rxd2 = RX_DMA_LSO;
else
return 0;
}
-@@ -2280,7 +2388,7 @@ static irqreturn_t mtk_handle_irq_rx(int
+@@ -2301,7 +2409,7 @@ static irqreturn_t mtk_handle_irq_rx(int
eth->rx_events++;
if (likely(napi_schedule_prep(ð->rx_napi))) {
__napi_schedule(ð->rx_napi);
}
return IRQ_HANDLED;
-@@ -2304,8 +2412,10 @@ static irqreturn_t mtk_handle_irq(int ir
+@@ -2325,8 +2433,10 @@ static irqreturn_t mtk_handle_irq(int ir
struct mtk_eth *eth = _eth;
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
mtk_handle_irq_rx(irq, _eth);
}
if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) {
-@@ -2323,16 +2433,16 @@ static void mtk_poll_controller(struct n
+@@ -2344,16 +2454,16 @@ static void mtk_poll_controller(struct n
struct mtk_eth *eth = mac->hw;
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
int err;
-@@ -2343,12 +2453,19 @@ static int mtk_start_dma(struct mtk_eth
+@@ -2364,12 +2474,19 @@ static int mtk_start_dma(struct mtk_eth
}
if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
mtk_w32(eth,
MTK_RX_DMA_EN | rx_2b_offset |
MTK_RX_BT_32DWORDS | MTK_MULTI_EN,
-@@ -2420,7 +2537,7 @@ static int mtk_open(struct net_device *d
+@@ -2443,7 +2560,7 @@ static int mtk_open(struct net_device *d
napi_enable(ð->tx_napi);
napi_enable(ð->rx_napi);
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
refcount_set(ð->dma_refcnt, 1);
}
else
-@@ -2472,7 +2589,7 @@ static int mtk_stop(struct net_device *d
+@@ -2495,7 +2612,7 @@ static int mtk_stop(struct net_device *d
mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
napi_disable(ð->tx_napi);
napi_disable(ð->rx_napi);
-@@ -2632,9 +2749,25 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -2655,9 +2772,25 @@ static int mtk_hw_init(struct mtk_eth *e
return 0;
}
if (eth->pctl) {
/* Set GE2 driving and slew rate */
-@@ -2673,11 +2806,47 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -2696,11 +2829,47 @@ static int mtk_hw_init(struct mtk_eth *e
/* FE int grouping */
mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp);
return 0;
err_disable_pm:
-@@ -3214,12 +3383,8 @@ static int mtk_probe(struct platform_dev
+@@ -3230,12 +3399,8 @@ static int mtk_probe(struct platform_dev
if (IS_ERR(eth->base))
return PTR_ERR(eth->base);
spin_lock_init(ð->page_lock);
spin_lock_init(ð->tx_irq_lock);
-@@ -3455,6 +3620,10 @@ static const struct mtk_soc_data mt2701_
+@@ -3471,6 +3636,10 @@ static const struct mtk_soc_data mt2701_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3468,6 +3637,10 @@ static const struct mtk_soc_data mt7621_
+@@ -3484,6 +3653,10 @@ static const struct mtk_soc_data mt7621_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3482,6 +3655,10 @@ static const struct mtk_soc_data mt7622_
+@@ -3498,6 +3671,10 @@ static const struct mtk_soc_data mt7622_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3495,6 +3672,10 @@ static const struct mtk_soc_data mt7623_
+@@ -3511,6 +3688,10 @@ static const struct mtk_soc_data mt7623_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3508,6 +3689,10 @@ static const struct mtk_soc_data mt7629_
+@@ -3524,6 +3705,10 @@ static const struct mtk_soc_data mt7629_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
},
};
-@@ -3520,6 +3705,10 @@ static const struct mtk_soc_data rt5350_
+@@ -3536,6 +3721,10 @@ static const struct mtk_soc_data rt5350_
.txrx = {
.txd_size = sizeof(struct mtk_tx_dma),
.rxd_size = sizeof(struct mtk_rx_dma),
/* PHY Indirect Access Control registers */
#define MTK_PHY_IAC 0x10004
#define PHY_IAC_ACCESS BIT(31)
-@@ -370,6 +434,16 @@
+@@ -371,6 +435,16 @@
#define ETHSYS_TRGMII_MT7621_DDR_PLL BIT(5)
/* ethernet reset control register */
#define ETHSYS_RSTCTRL 0x34
#define RSTCTRL_FE BIT(6)
#define RSTCTRL_PPE BIT(31)
-@@ -453,6 +527,17 @@ struct mtk_rx_dma {
+@@ -454,6 +528,17 @@ struct mtk_rx_dma {
unsigned int rxd4;
} __packed __aligned(4);
struct mtk_tx_dma {
unsigned int txd1;
unsigned int txd2;
-@@ -460,6 +545,17 @@ struct mtk_tx_dma {
+@@ -461,6 +546,17 @@ struct mtk_tx_dma {
unsigned int txd4;
} __packed __aligned(4);
struct mtk_eth;
struct mtk_mac;
-@@ -646,7 +742,9 @@ enum mkt_eth_capabilities {
+@@ -647,7 +743,9 @@ enum mkt_eth_capabilities {
MTK_SHARED_INT_BIT,
MTK_TRGMII_MT7621_CLK_BIT,
MTK_QDMA_BIT,
/* MUX BITS*/
MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT,
-@@ -678,7 +776,9 @@ enum mkt_eth_capabilities {
+@@ -679,7 +777,9 @@ enum mkt_eth_capabilities {
#define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT)
#define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT)
#define MTK_QDMA BIT(MTK_QDMA_BIT)
#define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \
BIT(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT)
-@@ -755,6 +855,7 @@ struct mtk_tx_dma_desc_info {
+@@ -756,6 +856,7 @@ struct mtk_tx_dma_desc_info {
dma_addr_t addr;
u32 size;
u16 vlan_tci;
u8 gso:1;
u8 csum:1;
u8 vlan:1;
-@@ -812,6 +913,10 @@ struct mtk_reg_map {
+@@ -813,6 +914,10 @@ struct mtk_reg_map {
* the extra setup for those pins used by GMAC.
* @txd_size Tx DMA descriptor size.
* @rxd_size Rx DMA descriptor size.
*/
struct mtk_soc_data {
const struct mtk_reg_map *reg_map;
-@@ -824,6 +929,10 @@ struct mtk_soc_data {
+@@ -825,6 +930,10 @@ struct mtk_soc_data {
struct {
u32 txd_size;
u32 rxd_size;
} txrx;
};
-@@ -942,7 +1051,6 @@ struct mtk_eth {
+@@ -943,7 +1052,6 @@ struct mtk_eth {
u32 tx_bytes;
struct dim tx_dim;