};
void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg)
-@@ -3692,6 +3729,21 @@ static const struct mtk_soc_data mt7629_
+@@ -3708,6 +3745,21 @@ static const struct mtk_soc_data mt7629_
},
};
static const struct mtk_soc_data rt5350_data = {
.reg_map = &mt7628_reg_map,
.caps = MT7628_CAPS,
-@@ -3714,6 +3766,7 @@ const struct of_device_id of_mtk_match[]
+@@ -3730,6 +3782,7 @@ const struct of_device_id of_mtk_match[]
{ .compatible = "mediatek,mt7622-eth", .data = &mt7622_data},
{ .compatible = "mediatek,mt7623-eth", .data = &mt7623_data},
{ .compatible = "mediatek,mt7629-eth", .data = &mt7629_data},
};
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-@@ -623,6 +623,10 @@ enum mtk_clks_map {
+@@ -624,6 +624,10 @@ enum mtk_clks_map {
MTK_CLK_SGMII2_CDR_FB,
MTK_CLK_SGMII_CK,
MTK_CLK_ETH2PLL,
MTK_CLK_MAX
};
-@@ -653,6 +657,16 @@ enum mtk_clks_map {
+@@ -654,6 +658,16 @@ enum mtk_clks_map {
BIT(MTK_CLK_SGMII2_CDR_FB) | \
BIT(MTK_CLK_SGMII_CK) | \
BIT(MTK_CLK_ETH2PLL) | BIT(MTK_CLK_SGMIITOP))
enum mtk_dev_state {
MTK_HW_INIT,
-@@ -851,6 +865,10 @@ enum mkt_eth_capabilities {
+@@ -852,6 +866,10 @@ enum mkt_eth_capabilities {
MTK_MUX_U3_GMAC2_TO_QPHY | \
MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA)