static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue);
static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue);
-@@ -1711,9 +1714,6 @@ static int __init_dma_rx_desc_rings(stru
+@@ -1712,9 +1715,6 @@ static int __init_dma_rx_desc_rings(stru
return -ENOMEM;
}
/* Setup the chained descriptor addresses */
if (priv->mode == STMMAC_CHAIN_MODE) {
if (priv->extend_desc)
-@@ -1819,12 +1819,6 @@ static int __init_dma_tx_desc_rings(stru
+@@ -1820,12 +1820,6 @@ static int __init_dma_tx_desc_rings(stru
tx_q->tx_skbuff[i] = NULL;
}
return 0;
}
-@@ -2693,10 +2687,7 @@ static void stmmac_tx_err(struct stmmac_
+@@ -2694,10 +2688,7 @@ static void stmmac_tx_err(struct stmmac_
stmmac_stop_tx_dma(priv, chan);
dma_free_tx_skbufs(priv, chan);
stmmac_clear_tx_descriptors(priv, chan);
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
tx_q->dma_tx_phy, chan);
stmmac_start_tx_dma(priv, chan);
-@@ -3780,6 +3771,8 @@ static int stmmac_open(struct net_device
+@@ -3781,6 +3772,8 @@ static int stmmac_open(struct net_device
}
}
ret = stmmac_hw_setup(dev, true);
if (ret < 0) {
netdev_err(priv->dev, "%s: Hw setup failed\n", __func__);
-@@ -6423,6 +6416,7 @@ void stmmac_enable_rx_queue(struct stmma
+@@ -6430,6 +6423,7 @@ void stmmac_enable_rx_queue(struct stmma
return;
}
stmmac_clear_rx_descriptors(priv, queue);
stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
-@@ -6484,6 +6478,7 @@ void stmmac_enable_tx_queue(struct stmma
+@@ -6491,6 +6485,7 @@ void stmmac_enable_tx_queue(struct stmma
return;
}
stmmac_clear_tx_descriptors(priv, queue);
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
-@@ -7406,6 +7401,25 @@ int stmmac_suspend(struct device *dev)
+@@ -7411,6 +7406,25 @@ int stmmac_suspend(struct device *dev)
}
EXPORT_SYMBOL_GPL(stmmac_suspend);
/**
* stmmac_reset_queues_param - reset queue parameters
* @priv: device pointer
-@@ -7416,22 +7430,11 @@ static void stmmac_reset_queues_param(st
+@@ -7421,22 +7435,11 @@ static void stmmac_reset_queues_param(st
u32 tx_cnt = priv->plat->tx_queues_to_use;
u32 queue;