}
static void
-@@ -646,14 +650,13 @@ static int
+@@ -660,14 +664,13 @@ static int
mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad,
int regnum)
{
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
!(val & MT7531_PHY_ACS_ST), 20, 100000);
-@@ -686,7 +689,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr
+@@ -700,7 +703,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr
ret = val & MT7531_MDIO_RW_DATA_MASK;
out:
return ret;
}
-@@ -695,14 +698,13 @@ static int
+@@ -709,14 +712,13 @@ static int
mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad,
int regnum, u32 data)
{
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
!(val & MT7531_PHY_ACS_ST), 20, 100000);
-@@ -734,7 +736,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p
+@@ -748,7 +750,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p
}
out:
return ret;
}
-@@ -742,14 +744,13 @@ out:
+@@ -756,14 +758,13 @@ out:
static int
mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum)
{
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val,
!(val & MT7531_PHY_ACS_ST), 20, 100000);
-@@ -772,7 +773,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr
+@@ -786,7 +787,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr
ret = val & MT7531_MDIO_RW_DATA_MASK;
out:
return ret;
}
-@@ -781,14 +782,13 @@ static int
+@@ -795,14 +796,13 @@ static int
mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum,
u16 data)
{
ret = readx_poll_timeout(_mt7530_unlocked_read, &p, reg,
!(reg & MT7531_PHY_ACS_ST), 20, 100000);
-@@ -810,7 +810,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p
+@@ -824,7 +824,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p
}
out:
return ret;
}
-@@ -1323,7 +1323,6 @@ static int
+@@ -1344,7 +1344,6 @@ static int
mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
{
struct mt7530_priv *priv = ds->priv;
int length;
u32 val;
-@@ -1334,7 +1333,7 @@ mt7530_port_change_mtu(struct dsa_switch
+@@ -1355,7 +1354,7 @@ mt7530_port_change_mtu(struct dsa_switch
if (!dsa_is_cpu_port(ds, port))
return 0;
val = mt7530_mii_read(priv, MT7530_GMACCR);
val &= ~MAX_RX_PKT_LEN_MASK;
-@@ -1355,7 +1354,7 @@ mt7530_port_change_mtu(struct dsa_switch
+@@ -1376,7 +1375,7 @@ mt7530_port_change_mtu(struct dsa_switch
mt7530_mii_write(priv, MT7530_GMACCR, val);
return 0;
}
-@@ -2151,10 +2150,10 @@ mt7530_irq_thread_fn(int irq, void *dev_
+@@ -2172,10 +2171,10 @@ mt7530_irq_thread_fn(int irq, void *dev_
u32 val;
int p;
for (p = 0; p < MT7530_NUM_PHYS; p++) {
if (BIT(p) & val) {
-@@ -2190,7 +2189,7 @@ mt7530_irq_bus_lock(struct irq_data *d)
+@@ -2211,7 +2210,7 @@ mt7530_irq_bus_lock(struct irq_data *d)
{
struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);
}
static void
-@@ -2199,7 +2198,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da
+@@ -2220,7 +2219,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da
struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);
mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv->irq_enable);