kernel: refresh generic 3.10 patches
[openwrt/staging/mkresin.git] / target / linux / generic / patches-3.10 / 020-ssb_update.patch
index 0a75e5ee65892cc49ae16c5dee3cd430a514d45d..354034ab4829072fb608be9980c0127b458db1d1 100644 (file)
@@ -1,8 +1,13 @@
-diff --git a/drivers/ssb/Kconfig b/drivers/ssb/Kconfig
-index 5ff3a4f..36171fd 100644
 --- a/drivers/ssb/Kconfig
 +++ b/drivers/ssb/Kconfig
-@@ -144,7 +144,7 @@ config SSB_SFLASH
+@@ -138,13 +138,13 @@ config SSB_DRIVER_MIPS
+ config SSB_SFLASH
+       bool "SSB serial flash support"
+-      depends on SSB_DRIVER_MIPS && BROKEN
++      depends on SSB_DRIVER_MIPS
+       default y
  # Assumption: We are on embedded, if we compile the MIPS core.
  config SSB_EMBEDDED
        bool
@@ -11,8 +16,14 @@ index 5ff3a4f..36171fd 100644
        default y
  
  config SSB_DRIVER_EXTIF
-diff --git a/drivers/ssb/driver_chipcommon_sflash.c b/drivers/ssb/driver_chipcommon_sflash.c
-index 720665c..e84cf04 100644
+@@ -168,6 +168,7 @@ config SSB_DRIVER_GIGE
+ config SSB_DRIVER_GPIO
+       bool "SSB GPIO driver"
+       depends on SSB && GPIOLIB
++      select IRQ_DOMAIN if SSB_EMBEDDED
+       help
+         Driver to provide access to the GPIO pins on the bus.
 --- a/drivers/ssb/driver_chipcommon_sflash.c
 +++ b/drivers/ssb/driver_chipcommon_sflash.c
 @@ -9,6 +9,19 @@
@@ -44,8 +55,12 @@ index 720665c..e84cf04 100644
        { "M25P20", 0x11, 0x10000, 4, },
        { "M25P40", 0x12, 0x10000, 8, },
  
-@@ -27,7 +40,7 @@ static struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
-       { 0 },
+@@ -24,10 +37,10 @@ static struct ssb_sflash_tbl_e ssb_sflas
+       { "M25P32", 0x15, 0x10000, 64, },
+       { "M25P64", 0x16, 0x10000, 128, },
+       { "M25FL128", 0x17, 0x10000, 256, },
+-      { 0 },
++      { NULL },
  };
  
 -static struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
@@ -53,8 +68,12 @@ index 720665c..e84cf04 100644
        { "SST25WF512", 1, 0x1000, 16, },
        { "SST25VF512", 0x48, 0x1000, 16, },
        { "SST25WF010", 2, 0x1000, 32, },
-@@ -45,7 +58,7 @@ static struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
-       { 0 },
+@@ -42,10 +55,10 @@ static struct ssb_sflash_tbl_e ssb_sflas
+       { "SST25VF016", 0x41, 0x1000, 512, },
+       { "SST25VF032", 0x4a, 0x1000, 1024, },
+       { "SST25VF064", 0x4b, 0x1000, 2048, },
+-      { 0 },
++      { NULL },
  };
  
 -static struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
@@ -62,7 +81,16 @@ index 720665c..e84cf04 100644
        { "AT45DB011", 0xc, 256, 512, },
        { "AT45DB021", 0x14, 256, 1024, },
        { "AT45DB041", 0x1c, 256, 2048, },
-@@ -73,7 +86,8 @@ static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
+@@ -53,7 +66,7 @@ static struct ssb_sflash_tbl_e ssb_sflas
+       { "AT45DB161", 0x2c, 512, 4096, },
+       { "AT45DB321", 0x34, 512, 8192, },
+       { "AT45DB642", 0x3c, 1024, 8192, },
+-      { 0 },
++      { NULL },
+ };
+ static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
+@@ -73,7 +86,8 @@ static void ssb_sflash_cmd(struct ssb_ch
  /* Initialize serial flash access */
  int ssb_sflash_init(struct ssb_chipcommon *cc)
  {
@@ -72,33 +100,425 @@ index 720665c..e84cf04 100644
        u32 id, id2;
  
        switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
-@@ -131,9 +145,21 @@ int ssb_sflash_init(struct ssb_chipcommon *cc)
+@@ -131,10 +145,20 @@ int ssb_sflash_init(struct ssb_chipcommo
                return -ENOTSUPP;
        }
  
+-      pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
+-              e->name, e->blocksize, e->numblocks);
+-
+-      pr_err("Serial flash support is not implemented yet!\n");
 +      sflash->window = SSB_FLASH2;
 +      sflash->blocksize = e->blocksize;
 +      sflash->numblocks = e->numblocks;
 +      sflash->size = sflash->blocksize * sflash->numblocks;
 +      sflash->present = true;
 +
-       pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n",
-               e->name, e->blocksize, e->numblocks);
++      pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
++              e->name, sflash->size / 1024, e->blocksize, e->numblocks);
++
 +      /* Prepare platform device, but don't register it yet. It's too early,
 +       * malloc (required by device_private_init) is not available yet. */
 +      ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
 +                                       sflash->size;
 +      ssb_sflash_dev.dev.platform_data = sflash;
+-      return -ENOTSUPP;
++      return 0;
+ }
+--- a/drivers/ssb/driver_gpio.c
++++ b/drivers/ssb/driver_gpio.c
+@@ -9,16 +9,40 @@
+  */
+ #include <linux/gpio.h>
++#include <linux/irq.h>
++#include <linux/interrupt.h>
++#include <linux/irqdomain.h>
+ #include <linux/export.h>
+ #include <linux/ssb/ssb.h>
+ #include "ssb_private.h"
++
++/**************************************************
++ * Shared
++ **************************************************/
++
+ static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
+ {
+       return container_of(chip, struct ssb_bus, gpio);
+ }
++#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
++static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++      struct ssb_bus *bus = ssb_gpio_get_bus(chip);
++
++      if (bus->bustype == SSB_BUSTYPE_SSB)
++              return irq_find_mapping(bus->irq_domain, gpio);
++      else
++              return -EINVAL;
++}
++#endif
++
++/**************************************************
++ * ChipCommon
++ **************************************************/
++
+ static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
+ {
+       struct ssb_bus *bus = ssb_gpio_get_bus(chip);
+@@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct 
+       ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
+ }
+-static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
++#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
++static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
+ {
+-      struct ssb_bus *bus = ssb_gpio_get_bus(chip);
++      struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
++      int gpio = irqd_to_hwirq(d);
+-      if (bus->bustype == SSB_BUSTYPE_SSB)
+-              return ssb_mips_irq(bus->chipco.dev) + 2;
+-      else
+-              return -EINVAL;
++      ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
++}
++
++static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
++{
++      struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
++      int gpio = irqd_to_hwirq(d);
++      u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
++
++      ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
++      ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
++}
++
++static struct irq_chip ssb_gpio_irq_chipco_chip = {
++      .name           = "SSB-GPIO-CC",
++      .irq_mask       = ssb_gpio_irq_chipco_mask,
++      .irq_unmask     = ssb_gpio_irq_chipco_unmask,
++};
++
++static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
++{
++      struct ssb_bus *bus = dev_id;
++      struct ssb_chipcommon *chipco = &bus->chipco;
++      u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
++      u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
++      u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
++      unsigned long irqs = (val ^ pol) & mask;
++      int gpio;
++
++      if (!irqs)
++              return IRQ_NONE;
++
++      for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
++              generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
++      ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
++
++      return IRQ_HANDLED;
++}
++
++static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
++{
++      struct ssb_chipcommon *chipco = &bus->chipco;
++      struct gpio_chip *chip = &bus->gpio;
++      int gpio, hwirq, err;
++
++      if (bus->bustype != SSB_BUSTYPE_SSB)
++              return 0;
++
++      bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
++                                              &irq_domain_simple_ops, chipco);
++      if (!bus->irq_domain) {
++              err = -ENODEV;
++              goto err_irq_domain;
++      }
++      for (gpio = 0; gpio < chip->ngpio; gpio++) {
++              int irq = irq_create_mapping(bus->irq_domain, gpio);
++
++              irq_set_chip_data(irq, bus);
++              irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
++                                       handle_simple_irq);
++      }
++
++      hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
++      err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
++                        "gpio", bus);
++      if (err)
++              goto err_req_irq;
++
++      ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
++      chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
++
++      return 0;
++
++err_req_irq:
++      for (gpio = 0; gpio < chip->ngpio; gpio++) {
++              int irq = irq_find_mapping(bus->irq_domain, gpio);
++
++              irq_dispose_mapping(irq);
++      }
++      irq_domain_remove(bus->irq_domain);
++err_irq_domain:
++      return err;
++}
++
++static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
++{
++      struct ssb_chipcommon *chipco = &bus->chipco;
++      struct gpio_chip *chip = &bus->gpio;
++      int gpio;
++
++      if (bus->bustype != SSB_BUSTYPE_SSB)
++              return;
++
++      chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
++      free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
++      for (gpio = 0; gpio < chip->ngpio; gpio++) {
++              int irq = irq_find_mapping(bus->irq_domain, gpio);
++
++              irq_dispose_mapping(irq);
++      }
++      irq_domain_remove(bus->irq_domain);
++}
++#else
++static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
++{
++      return 0;
++}
++
++static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
++{
+ }
++#endif
+ static int ssb_gpio_chipco_init(struct ssb_bus *bus)
+ {
+       struct gpio_chip *chip = &bus->gpio;
++      int err;
+       chip->label             = "ssb_chipco_gpio";
+       chip->owner             = THIS_MODULE;
+@@ -96,7 +230,9 @@ static int ssb_gpio_chipco_init(struct s
+       chip->set               = ssb_gpio_chipco_set_value;
+       chip->direction_input   = ssb_gpio_chipco_direction_input;
+       chip->direction_output  = ssb_gpio_chipco_direction_output;
+-      chip->to_irq            = ssb_gpio_chipco_to_irq;
++#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
++      chip->to_irq            = ssb_gpio_to_irq;
++#endif
+       chip->ngpio             = 16;
+       /* There is just one SoC in one device and its GPIO addresses should be
+        * deterministic to address them more easily. The other buses could get
+@@ -106,9 +242,23 @@ static int ssb_gpio_chipco_init(struct s
+       else
+               chip->base              = -1;
+-      return gpiochip_add(chip);
++      err = ssb_gpio_irq_chipco_domain_init(bus);
++      if (err)
++              return err;
++
++      err = gpiochip_add(chip);
++      if (err) {
++              ssb_gpio_irq_chipco_domain_exit(bus);
++              return err;
++      }
++
++      return 0;
+ }
++/**************************************************
++ * EXTIF
++ **************************************************/
++
+ #ifdef CONFIG_SSB_DRIVER_EXTIF
+ static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
+@@ -145,19 +295,127 @@ static int ssb_gpio_extif_direction_outp
+       return 0;
+ }
+-static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
++#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
++static void ssb_gpio_irq_extif_mask(struct irq_data *d)
+ {
+-      struct ssb_bus *bus = ssb_gpio_get_bus(chip);
++      struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
++      int gpio = irqd_to_hwirq(d);
+-      if (bus->bustype == SSB_BUSTYPE_SSB)
+-              return ssb_mips_irq(bus->extif.dev) + 2;
+-      else
+-              return -EINVAL;
++      ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
++}
++
++static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
++{
++      struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
++      int gpio = irqd_to_hwirq(d);
++      u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
++
++      ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
++      ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
++}
 +
-       pr_err("Serial flash support is not implemented yet!\n");
++static struct irq_chip ssb_gpio_irq_extif_chip = {
++      .name           = "SSB-GPIO-EXTIF",
++      .irq_mask       = ssb_gpio_irq_extif_mask,
++      .irq_unmask     = ssb_gpio_irq_extif_unmask,
++};
++
++static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
++{
++      struct ssb_bus *bus = dev_id;
++      struct ssb_extif *extif = &bus->extif;
++      u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
++      u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
++      u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
++      unsigned long irqs = (val ^ pol) & mask;
++      int gpio;
++
++      if (!irqs)
++              return IRQ_NONE;
++
++      for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
++              generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
++      ssb_extif_gpio_polarity(extif, irqs, val & irqs);
++
++      return IRQ_HANDLED;
++}
++
++static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
++{
++      struct ssb_extif *extif = &bus->extif;
++      struct gpio_chip *chip = &bus->gpio;
++      int gpio, hwirq, err;
++
++      if (bus->bustype != SSB_BUSTYPE_SSB)
++              return 0;
++
++      bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
++                                              &irq_domain_simple_ops, extif);
++      if (!bus->irq_domain) {
++              err = -ENODEV;
++              goto err_irq_domain;
++      }
++      for (gpio = 0; gpio < chip->ngpio; gpio++) {
++              int irq = irq_create_mapping(bus->irq_domain, gpio);
++
++              irq_set_chip_data(irq, bus);
++              irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
++                                       handle_simple_irq);
++      }
++
++      hwirq = ssb_mips_irq(bus->extif.dev) + 2;
++      err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
++                        "gpio", bus);
++      if (err)
++              goto err_req_irq;
++
++      ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
++
++      return 0;
++
++err_req_irq:
++      for (gpio = 0; gpio < chip->ngpio; gpio++) {
++              int irq = irq_find_mapping(bus->irq_domain, gpio);
++
++              irq_dispose_mapping(irq);
++      }
++      irq_domain_remove(bus->irq_domain);
++err_irq_domain:
++      return err;
+ }
  
-       return -ENOTSUPP;
-diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
-index 812775a..e55ddf7 100644
++static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
++{
++      struct ssb_extif *extif = &bus->extif;
++      struct gpio_chip *chip = &bus->gpio;
++      int gpio;
++
++      if (bus->bustype != SSB_BUSTYPE_SSB)
++              return;
++
++      free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
++      for (gpio = 0; gpio < chip->ngpio; gpio++) {
++              int irq = irq_find_mapping(bus->irq_domain, gpio);
++
++              irq_dispose_mapping(irq);
++      }
++      irq_domain_remove(bus->irq_domain);
++}
++#else
++static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
++{
++      return 0;
++}
++
++static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
++{
++}
++#endif
++
+ static int ssb_gpio_extif_init(struct ssb_bus *bus)
+ {
+       struct gpio_chip *chip = &bus->gpio;
++      int err;
+       chip->label             = "ssb_extif_gpio";
+       chip->owner             = THIS_MODULE;
+@@ -165,7 +423,9 @@ static int ssb_gpio_extif_init(struct ss
+       chip->set               = ssb_gpio_extif_set_value;
+       chip->direction_input   = ssb_gpio_extif_direction_input;
+       chip->direction_output  = ssb_gpio_extif_direction_output;
+-      chip->to_irq            = ssb_gpio_extif_to_irq;
++#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
++      chip->to_irq            = ssb_gpio_to_irq;
++#endif
+       chip->ngpio             = 5;
+       /* There is just one SoC in one device and its GPIO addresses should be
+        * deterministic to address them more easily. The other buses could get
+@@ -175,7 +435,17 @@ static int ssb_gpio_extif_init(struct ss
+       else
+               chip->base              = -1;
+-      return gpiochip_add(chip);
++      err = ssb_gpio_irq_extif_domain_init(bus);
++      if (err)
++              return err;
++
++      err = gpiochip_add(chip);
++      if (err) {
++              ssb_gpio_irq_extif_domain_exit(bus);
++              return err;
++      }
++
++      return 0;
+ }
+ #else
+@@ -185,6 +455,10 @@ static int ssb_gpio_extif_init(struct ss
+ }
+ #endif
++/**************************************************
++ * Init
++ **************************************************/
++
+ int ssb_gpio_init(struct ssb_bus *bus)
+ {
+       if (ssb_chipco_available(&bus->chipco))
 --- a/drivers/ssb/main.c
 +++ b/drivers/ssb/main.c
-@@ -553,6 +553,14 @@ static int ssb_devices_register(struct ssb_bus *bus)
+@@ -553,6 +553,14 @@ static int ssb_devices_register(struct s
        }
  #endif
  
@@ -113,11 +533,190 @@ index 812775a..e55ddf7 100644
        return 0;
  error:
        /* Unwind the already registered devices. */
-diff --git a/drivers/ssb/pcihost_wrapper.c b/drivers/ssb/pcihost_wrapper.c
-index 32ed1fa..69161bb 100644
+@@ -582,6 +590,13 @@ static int ssb_attach_queued_buses(void)
+               ssb_pcicore_init(&bus->pcicore);
+               if (bus->bustype == SSB_BUSTYPE_SSB)
+                       ssb_watchdog_register(bus);
++
++              err = ssb_gpio_init(bus);
++              if (err == -ENOTSUPP)
++                      ssb_dbg("GPIO driver not activated\n");
++              else if (err)
++                      ssb_dbg("Error registering GPIO driver: %i\n", err);
++
+               ssb_bus_may_powerdown(bus);
+               err = ssb_devices_register(bus);
+@@ -819,11 +834,6 @@ static int ssb_bus_register(struct ssb_b
+       ssb_chipcommon_init(&bus->chipco);
+       ssb_extif_init(&bus->extif);
+       ssb_mipscore_init(&bus->mipscore);
+-      err = ssb_gpio_init(bus);
+-      if (err == -ENOTSUPP)
+-              ssb_dbg("GPIO driver not activated\n");
+-      else if (err)
+-              ssb_dbg("Error registering GPIO driver: %i\n", err);
+       err = ssb_fetch_invariants(bus, get_invariants);
+       if (err) {
+               ssb_bus_may_powerdown(bus);
+--- a/drivers/ssb/pci.c
++++ b/drivers/ssb/pci.c
+@@ -326,13 +326,13 @@ err_ctlreg:
+       return err;
+ }
+-static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
+-                             u16 mask, u16 shift)
++static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset,
++                              u16 mask, u16 shift)
+ {
+       u16 v;
+       u8 gain;
+-      v = in[SPOFF(SSB_SPROM1_AGAIN)];
++      v = in[SPOFF(offset)];
+       gain = (v & mask) >> shift;
+       if (gain == 0xFF)
+               gain = 2; /* If unset use 2dBm */
+@@ -416,12 +416,14 @@ static void sprom_extract_r123(struct ss
+       SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
+       /* Extract the antenna gain values. */
+-      out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
+-                                                  SSB_SPROM1_AGAIN_BG,
+-                                                  SSB_SPROM1_AGAIN_BG_SHIFT);
+-      out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
+-                                                  SSB_SPROM1_AGAIN_A,
+-                                                  SSB_SPROM1_AGAIN_A_SHIFT);
++      out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM1_AGAIN,
++                                                   SSB_SPROM1_AGAIN_BG,
++                                                   SSB_SPROM1_AGAIN_BG_SHIFT);
++      out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM1_AGAIN,
++                                                   SSB_SPROM1_AGAIN_A,
++                                                   SSB_SPROM1_AGAIN_A_SHIFT);
+       if (out->revision >= 2)
+               sprom_extract_r23(out, in);
+ }
+@@ -468,7 +470,15 @@ static void sprom_extract_r458(struct ss
+ static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
+ {
++      static const u16 pwr_info_offset[] = {
++              SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1,
++              SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3
++      };
+       u16 il0mac_offset;
++      int i;
++
++      BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
++                   ARRAY_SIZE(out->core_pwr_info));
+       if (out->revision == 4)
+               il0mac_offset = SSB_SPROM4_IL0MAC;
+@@ -524,14 +534,59 @@ static void sprom_extract_r45(struct ssb
+       }
+       /* Extract the antenna gain values. */
+-      SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
+-           SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
+-      SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
+-           SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
+-      SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
+-           SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
+-      SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
+-           SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
++      out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM4_AGAIN01,
++                                                   SSB_SPROM4_AGAIN0,
++                                                   SSB_SPROM4_AGAIN0_SHIFT);
++      out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM4_AGAIN01,
++                                                   SSB_SPROM4_AGAIN1,
++                                                   SSB_SPROM4_AGAIN1_SHIFT);
++      out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM4_AGAIN23,
++                                                   SSB_SPROM4_AGAIN2,
++                                                   SSB_SPROM4_AGAIN2_SHIFT);
++      out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM4_AGAIN23,
++                                                   SSB_SPROM4_AGAIN3,
++                                                   SSB_SPROM4_AGAIN3_SHIFT);
++
++      /* Extract cores power info info */
++      for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
++              u16 o = pwr_info_offset[i];
++
++              SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
++                      SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT);
++              SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
++                      SSB_SPROM4_2G_MAXP, 0);
++
++              SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0);
++              SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0);
++              SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0);
++              SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0);
++
++              SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
++                      SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT);
++              SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
++                      SSB_SPROM4_5G_MAXP, 0);
++              SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP,
++                      SSB_SPROM4_5GH_MAXP, 0);
++              SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP,
++                      SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT);
++
++              SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0);
++              SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0);
++      }
+       sprom_extract_r458(out, in);
+@@ -621,14 +676,22 @@ static void sprom_extract_r8(struct ssb_
+       SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
+       /* Extract the antenna gain values. */
+-      SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
+-           SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
+-      SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
+-           SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
+-      SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
+-           SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
+-      SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
+-           SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
++      out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM8_AGAIN01,
++                                                   SSB_SPROM8_AGAIN0,
++                                                   SSB_SPROM8_AGAIN0_SHIFT);
++      out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM8_AGAIN01,
++                                                   SSB_SPROM8_AGAIN1,
++                                                   SSB_SPROM8_AGAIN1_SHIFT);
++      out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM8_AGAIN23,
++                                                   SSB_SPROM8_AGAIN2,
++                                                   SSB_SPROM8_AGAIN2_SHIFT);
++      out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
++                                                   SSB_SPROM8_AGAIN23,
++                                                   SSB_SPROM8_AGAIN3,
++                                                   SSB_SPROM8_AGAIN3_SHIFT);
+       /* Extract cores power info info */
+       for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
 --- a/drivers/ssb/pcihost_wrapper.c
 +++ b/drivers/ssb/pcihost_wrapper.c
-@@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci_dev *dev)
+@@ -38,7 +38,7 @@ static int ssb_pcihost_resume(struct pci
        struct ssb_bus *ssb = pci_get_drvdata(dev);
        int err;
  
@@ -126,11 +725,9 @@ index 32ed1fa..69161bb 100644
        err = pci_enable_device(dev);
        if (err)
                return err;
-diff --git a/drivers/ssb/sprom.c b/drivers/ssb/sprom.c
-index a3b2364..e753fbe 100644
 --- a/drivers/ssb/sprom.c
 +++ b/drivers/ssb/sprom.c
-@@ -54,7 +54,7 @@ static int hex2sprom(u16 *sprom, const char *dump, size_t len,
+@@ -54,7 +54,7 @@ static int hex2sprom(u16 *sprom, const c
        while (cnt < sprom_size_words) {
                memcpy(tmp, dump, 4);
                dump += 4;
@@ -139,11 +736,9 @@ index a3b2364..e753fbe 100644
                if (err)
                        return err;
                sprom[cnt++] = swab16((u16)parsed);
-diff --git a/drivers/ssb/ssb_private.h b/drivers/ssb/ssb_private.h
-index 4671f17..eb507a5 100644
 --- a/drivers/ssb/ssb_private.h
 +++ b/drivers/ssb/ssb_private.h
-@@ -243,6 +243,10 @@ static inline int ssb_sflash_init(struct ssb_chipcommon *cc)
+@@ -243,6 +243,10 @@ static inline int ssb_sflash_init(struct
  extern struct platform_device ssb_pflash_dev;
  #endif
  
@@ -154,8 +749,54 @@ index 4671f17..eb507a5 100644
  #ifdef CONFIG_SSB_DRIVER_EXTIF
  extern u32 ssb_extif_watchdog_timer_set_wdt(struct bcm47xx_wdt *wdt, u32 ticks);
  extern u32 ssb_extif_watchdog_timer_set_ms(struct bcm47xx_wdt *wdt, u32 ms);
-diff --git a/include/linux/ssb/ssb_driver_mips.h b/include/linux/ssb/ssb_driver_mips.h
-index afe79d4..6535e47 100644
+--- a/include/linux/ssb/ssb.h
++++ b/include/linux/ssb/ssb.h
+@@ -33,6 +33,7 @@ struct ssb_sprom {
+       u8 et1phyaddr;          /* MII address for enet1 */
+       u8 et0mdcport;          /* MDIO for enet0 */
+       u8 et1mdcport;          /* MDIO for enet1 */
++      u16 dev_id;             /* Device ID overriding e.g. PCI ID */
+       u16 board_rev;          /* Board revision number from SPROM. */
+       u16 board_num;          /* Board number from SPROM. */
+       u16 board_type;         /* Board type from SPROM. */
+@@ -486,6 +487,7 @@ struct ssb_bus {
+ #endif /* EMBEDDED */
+ #ifdef CONFIG_SSB_DRIVER_GPIO
+       struct gpio_chip gpio;
++      struct irq_domain *irq_domain;
+ #endif /* DRIVER_GPIO */
+       /* Internal-only stuff follows. Do not touch. */
+--- a/include/linux/ssb/ssb_driver_gige.h
++++ b/include/linux/ssb/ssb_driver_gige.h
+@@ -108,6 +108,16 @@ static inline int ssb_gige_get_macaddr(s
+       return 0;
+ }
++/* Get the device phy address */
++static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
++{
++      struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
++      if (!dev)
++              return -ENODEV;
++
++      return dev->dev->bus->sprom.et0phyaddr;
++}
++
+ extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
+                                         struct pci_dev *pdev);
+ extern int ssb_gige_map_irq(struct ssb_device *sdev,
+@@ -174,6 +184,10 @@ static inline int ssb_gige_get_macaddr(s
+ {
+       return -ENODEV;
+ }
++static inline int ssb_gige_get_phyaddr(struct pci_dev *pdev)
++{
++      return -ENODEV;
++}
+ #endif /* CONFIG_SSB_DRIVER_GIGE */
+ #endif /* LINUX_SSB_DRIVER_GIGE_H_ */
 --- a/include/linux/ssb/ssb_driver_mips.h
 +++ b/include/linux/ssb/ssb_driver_mips.h
 @@ -20,6 +20,18 @@ struct ssb_pflash {
@@ -187,8 +828,6 @@ index afe79d4..6535e47 100644
  };
  
  extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
-diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
-index 3a72569..f9f931c 100644
 --- a/include/linux/ssb/ssb_regs.h
 +++ b/include/linux/ssb/ssb_regs.h
 @@ -172,6 +172,7 @@
@@ -199,3 +838,57 @@ index 3a72569..f9f931c 100644
  #define SSB_SPROM_BASE1                       0x1000
  #define SSB_SPROM_BASE31              0x0800
  #define SSB_SPROM_REVISION            0x007E
+@@ -344,6 +345,43 @@
+ #define  SSB_SPROM4_TXPID5GH2_SHIFT   0
+ #define  SSB_SPROM4_TXPID5GH3         0xFF00
+ #define  SSB_SPROM4_TXPID5GH3_SHIFT   8
++
++/* There are 4 blocks with power info sharing the same layout */
++#define SSB_SPROM4_PWR_INFO_CORE0     0x0080
++#define SSB_SPROM4_PWR_INFO_CORE1     0x00AE
++#define SSB_SPROM4_PWR_INFO_CORE2     0x00DC
++#define SSB_SPROM4_PWR_INFO_CORE3     0x010A
++
++#define SSB_SPROM4_2G_MAXP_ITSSI      0x00    /* 2 GHz ITSSI and 2 GHz Max Power */
++#define  SSB_SPROM4_2G_MAXP           0x00FF
++#define  SSB_SPROM4_2G_ITSSI          0xFF00
++#define  SSB_SPROM4_2G_ITSSI_SHIFT    8
++#define SSB_SPROM4_2G_PA_0            0x02    /* 2 GHz power amp */
++#define SSB_SPROM4_2G_PA_1            0x04
++#define SSB_SPROM4_2G_PA_2            0x06
++#define SSB_SPROM4_2G_PA_3            0x08
++#define SSB_SPROM4_5G_MAXP_ITSSI      0x0A    /* 5 GHz ITSSI and 5.3 GHz Max Power */
++#define  SSB_SPROM4_5G_MAXP           0x00FF
++#define  SSB_SPROM4_5G_ITSSI          0xFF00
++#define  SSB_SPROM4_5G_ITSSI_SHIFT    8
++#define SSB_SPROM4_5GHL_MAXP          0x0C    /* 5.2 GHz and 5.8 GHz Max Power */
++#define  SSB_SPROM4_5GH_MAXP          0x00FF
++#define  SSB_SPROM4_5GL_MAXP          0xFF00
++#define  SSB_SPROM4_5GL_MAXP_SHIFT    8
++#define SSB_SPROM4_5G_PA_0            0x0E    /* 5.3 GHz power amp */
++#define SSB_SPROM4_5G_PA_1            0x10
++#define SSB_SPROM4_5G_PA_2            0x12
++#define SSB_SPROM4_5G_PA_3            0x14
++#define SSB_SPROM4_5GL_PA_0           0x16    /* 5.2 GHz power amp */
++#define SSB_SPROM4_5GL_PA_1           0x18
++#define SSB_SPROM4_5GL_PA_2           0x1A
++#define SSB_SPROM4_5GL_PA_3           0x1C
++#define SSB_SPROM4_5GH_PA_0           0x1E    /* 5.8 GHz power amp */
++#define SSB_SPROM4_5GH_PA_1           0x20
++#define SSB_SPROM4_5GH_PA_2           0x22
++#define SSB_SPROM4_5GH_PA_3           0x24
++
++/* TODO: Make it deprecated */
+ #define SSB_SPROM4_MAXP_BG            0x0080  /* Max Power BG in path 1 */
+ #define  SSB_SPROM4_MAXP_BG_MASK      0x00FF  /* Mask for Max Power BG */
+ #define  SSB_SPROM4_ITSSI_BG          0xFF00  /* Mask for path 1 itssi_bg */
+--- a/arch/mips/bcm47xx/sprom.c
++++ b/arch/mips/bcm47xx/sprom.c
+@@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
+ static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
+                                       const char *prefix, bool fallback)
+ {
++      nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
+       nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
+       nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
+       nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);