/*------------ GENERAL */
#define BOARD_SYSTEM_TYPE "IFXMIPS"
+#define IFXMIPS_SYS_TYPE_LEN 0x100
#define IOPORT_RESOURCE_START 0x10000000
#define IOPORT_RESOURCE_END 0xffffffff
/*------------ ETOP */
#define IFXMIPS_PPE32_BASE_ADDR 0xBE180000
+#define IFXMIPS_PPE32_SIZE 0x40000
#define ETHERNET_PACKET_DMA_BUFFER_SIZE 0x600
/*------------ WDT */
-#define IFXMIPS_WDT_BASE_ADDR (KSEG1 + 0x1F880000)
+#define IFXMIPS_WDT_BASE_ADDR (KSEG1 + 0x1F880000)
+#define IFXMIPS_WDT_SIZE 0x400
#define IFXMIPS_BIU_WDT_CR ((u32 *)(IFXMIPS_WDT_BASE_ADDR + 0x03F0))
#define IFXMIPS_BIU_WDT_SR ((u32 *)(IFXMIPS_WDT_BASE_ADDR + 0x03F8))