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layerscape: add LS1021AIOT board support
[openwrt/openwrt.git] / target / linux / layerscape / patches-4.9 / 301-arch-support-layerscape.patch
diff --git a/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch b/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch
index 66860a0bb62f8aa7a0112dca0eaabd24d38d8637..2985cff0b521c3f5125ec2ccd531791a765be9b1 100644 (file)
--- a/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch
+++ b/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch
@@ -1,12 +1,12 @@
-From 739029f49bd9181b821298f9d27b29ce2d292967 Mon Sep 17 00:00:00 2001
+From 2f2a0ab9e4b3186be981f7151a4f4f794d4b6caa Mon Sep 17 00:00:00 2001
 From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 10:03:52 +0800
-Subject: [PATCH] arch: support layerscape
+Date: Thu, 5 Jul 2018 16:18:37 +0800
+Subject: [PATCH 03/32] arch: support layerscape
 MIME-Version: 1.0
 Content-Type: text/plain; charset=UTF-8
 Content-Transfer-Encoding: 8bit
 
-This is a integrated patch for layerscape arch support.
+This is an integrated patch for layerscape arch support.
 
 Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
 Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
@@ -20,22 +20,25 @@ Signed-off-by: Jianhua Xie <jianhua.xie@nxp.com>
 Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 ---
- arch/arm/include/asm/delay.h          | 16 +++++++++
- arch/arm/include/asm/io.h             | 31 ++++++++++++++++++
- arch/arm/include/asm/mach/map.h       |  4 +--
- arch/arm/include/asm/pgtable.h        |  7 ++++
- arch/arm/kernel/bios32.c              | 43 ++++++++++++++++++++++++
- arch/arm/mm/dma-mapping.c             |  1 +
- arch/arm/mm/ioremap.c                 |  7 ++++
- arch/arm/mm/mmu.c                     |  9 +++++
- arch/arm64/include/asm/cache.h        |  2 +-
- arch/arm64/include/asm/io.h           |  2 ++
- arch/arm64/include/asm/pci.h          |  4 +++
- arch/arm64/include/asm/pgtable-prot.h |  1 +
- arch/arm64/include/asm/pgtable.h      |  5 +++
- arch/arm64/kernel/pci.c               | 62 +++++++++++++++++++++++++++++++++++
- arch/arm64/mm/dma-mapping.c           | 23 ++++++++++---
- 15 files changed, 209 insertions(+), 8 deletions(-)
+ arch/arm/include/asm/delay.h           | 16 +++++++
+ arch/arm/include/asm/dma-mapping.h     |  6 ---
+ arch/arm/include/asm/io.h              | 31 +++++++++++++
+ arch/arm/include/asm/mach/map.h        |  4 +-
+ arch/arm/include/asm/pgtable.h         |  7 +++
+ arch/arm/kernel/bios32.c               | 43 ++++++++++++++++++
+ arch/arm/mm/dma-mapping.c              |  1 +
+ arch/arm/mm/ioremap.c                  |  7 +++
+ arch/arm/mm/mmu.c                      |  9 ++++
+ arch/arm64/include/asm/cache.h         |  2 +-
+ arch/arm64/include/asm/io.h            | 30 +++++++++++++
+ arch/arm64/include/asm/pci.h           |  4 ++
+ arch/arm64/include/asm/pgtable-prot.h  |  2 +
+ arch/arm64/include/asm/pgtable.h       |  5 +++
+ arch/arm64/kernel/pci.c                | 62 ++++++++++++++++++++++++++
+ arch/arm64/mm/dma-mapping.c            |  6 +++
+ arch/powerpc/include/asm/dma-mapping.h |  5 ---
+ arch/tile/include/asm/dma-mapping.h    |  5 ---
+ 18 files changed, 226 insertions(+), 19 deletions(-)
 
 --- a/arch/arm/include/asm/delay.h
 +++ b/arch/arm/include/asm/delay.h
@@ -62,6 +65,21 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  /* Loop-based definitions for assembly code. */
  extern void __loop_delay(unsigned long loops);
  extern void __loop_udelay(unsigned long usecs);
+--- a/arch/arm/include/asm/dma-mapping.h
++++ b/arch/arm/include/asm/dma-mapping.h
+@@ -31,12 +31,6 @@ static inline struct dma_map_ops *get_dm
+               return __generic_dma_ops(dev);
+ }
+ 
+-static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
+-{
+-      BUG_ON(!dev);
+-      dev->archdata.dma_ops = ops;
+-}
+-
+ #define HAVE_ARCH_DMA_SUPPORTED 1
+ extern int dma_supported(struct device *dev, u64 mask);
+ 
 --- a/arch/arm/include/asm/io.h
 +++ b/arch/arm/include/asm/io.h
 @@ -129,6 +129,7 @@ static inline u32 __raw_readl(const vola
@@ -207,7 +225,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
   * Note that the arbiter/ISA bridge appears to be buggy, specifically in
 --- a/arch/arm/mm/dma-mapping.c
 +++ b/arch/arm/mm/dma-mapping.c
-@@ -2392,6 +2392,7 @@ void arch_setup_dma_ops(struct device *d
+@@ -2410,6 +2410,7 @@ void arch_setup_dma_ops(struct device *d
  
        set_dma_ops(dev, dma_ops);
  }
@@ -284,6 +302,41 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
 +                                                __pgprot(PROT_NORMAL_NS))
  #define iounmap                               __iounmap
  
+ /*
+@@ -184,6 +186,34 @@ extern void __iomem *ioremap_cache(phys_
+ #define iowrite32be(v,p)      ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })
+ #define iowrite64be(v,p)      ({ __iowmb(); __raw_writeq((__force __u64)cpu_to_be64(v), p); })
+ 
++/* access ports */
++#define setbits32(_addr, _v) iowrite32be(ioread32be(_addr) |  (_v), (_addr))
++#define clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
++
++#define setbits16(_addr, _v) iowrite16be(ioread16be(_addr) |  (_v), (_addr))
++#define clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
++
++#define setbits8(_addr, _v) iowrite8(ioread8(_addr) |  (_v), (_addr))
++#define clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
++
++/* Clear and set bits in one shot.  These macros can be used to clear and
++ * set multiple bits in a register using a single read-modify-write.  These
++ * macros can also be used to set a multiple-bit bit pattern using a mask,
++ * by specifying the mask in the 'clear' parameter and the new bit pattern
++ * in the 'set' parameter.
++ */
++
++#define clrsetbits_be32(addr, clear, set) \
++      iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_le32(addr, clear, set) \
++      iowrite32le((ioread32le(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_be16(addr, clear, set) \
++      iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_le16(addr, clear, set) \
++      iowrite16le((ioread16le(addr) & ~(clear)) | (set), (addr))
++#define clrsetbits_8(addr, clear, set) \
++      iowrite8((ioread8(addr) & ~(clear)) | (set), (addr))
++
+ #include <asm-generic/io.h>
+ 
  /*
 --- a/arch/arm64/include/asm/pci.h
 +++ b/arch/arm64/include/asm/pci.h
@@ -300,7 +353,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
        return 1;
 --- a/arch/arm64/include/asm/pgtable-prot.h
 +++ b/arch/arm64/include/asm/pgtable-prot.h
-@@ -42,6 +42,7 @@
+@@ -48,6 +48,7 @@
  #define PROT_NORMAL_NC                (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
  #define PROT_NORMAL_WT                (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
  #define PROT_NORMAL           (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
@@ -308,9 +361,17 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  
  #define PROT_SECT_DEVICE_nGnRE        (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
  #define PROT_SECT_NORMAL      (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
+@@ -68,6 +69,7 @@
+ #define PAGE_HYP_DEVICE               __pgprot(PROT_DEVICE_nGnRE | PTE_HYP)
+ 
+ #define PAGE_S2                       __pgprot(_PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
++#define PAGE_S2_NS            __pgprot(PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDWR | PTE_TYPE_PAGE | PTE_AF)
+ #define PAGE_S2_DEVICE                __pgprot(_PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN)
+ 
+ #define PAGE_NONE             __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_NG | PTE_PXN | PTE_UXN)
 --- a/arch/arm64/include/asm/pgtable.h
 +++ b/arch/arm64/include/asm/pgtable.h
-@@ -356,6 +356,11 @@ static inline int pmd_protnone(pmd_t pmd
+@@ -370,6 +370,11 @@ static inline int pmd_protnone(pmd_t pmd
        __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
  #define pgprot_writecombine(prot) \
        __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
@@ -406,7 +467,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
  #include <linux/swiotlb.h>
  
  #include <asm/cacheflush.h>
-+#include <../../../drivers/staging/fsl-mc/include/mc-bus.h>
++#include <linux/fsl/mc.h>
  
  static int swiotlb __ro_after_init;
  
@@ -426,3 +487,31 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
        __iommu_setup_dma_ops(dev, dma_base, size, iommu);
  }
 +EXPORT_SYMBOL(arch_setup_dma_ops);
+--- a/arch/powerpc/include/asm/dma-mapping.h
++++ b/arch/powerpc/include/asm/dma-mapping.h
+@@ -91,11 +91,6 @@ static inline struct dma_map_ops *get_dm
+       return dev->archdata.dma_ops;
+ }
+ 
+-static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
+-{
+-      dev->archdata.dma_ops = ops;
+-}
+-
+ /*
+  * get_dma_offset()
+  *
+--- a/arch/tile/include/asm/dma-mapping.h
++++ b/arch/tile/include/asm/dma-mapping.h
+@@ -59,11 +59,6 @@ static inline phys_addr_t dma_to_phys(st
+ 
+ static inline void dma_mark_clean(void *addr, size_t size) {}
+ 
+-static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
+-{
+-      dev->archdata.dma_ops = ops;
+-}
+-
+ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
+ {
+       if (!dev->dma_mask)
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