}
EXPORT_SYMBOL(qe_issue_cmd);
-@@ -166,8 +182,8 @@ static unsigned int brg_clk = 0;
+@@ -169,8 +185,8 @@ static unsigned int brg_clk = 0;
unsigned int qe_get_brg_clk(void)
{
struct device_node *qe;
- const u32 *prop;
+ u32 val;
+ int ret;
+ unsigned int mod;
if (brg_clk)
- return brg_clk;
-@@ -179,9 +195,9 @@ unsigned int qe_get_brg_clk(void)
+@@ -183,9 +199,9 @@ unsigned int qe_get_brg_clk(void)
return brg_clk;
}
of_node_put(qe);
-@@ -221,7 +237,7 @@ int qe_setbrg(enum qe_clock brg, unsigne
+@@ -234,7 +250,7 @@ int qe_setbrg(enum qe_clock brg, unsigne
tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |
QE_BRGC_ENABLE | div16;
return 0;
}
-@@ -355,9 +371,9 @@ static int qe_sdma_init(void)
+@@ -368,9 +384,9 @@ static int qe_sdma_init(void)
return -ENOMEM;
}
return 0;
}
-@@ -395,14 +411,14 @@ static void qe_upload_microcode(const vo
+@@ -408,14 +424,14 @@ static void qe_upload_microcode(const vo
"uploading microcode '%s'\n", ucode->id);
/* Use auto-increment */
}
/*
-@@ -487,7 +503,7 @@ int qe_upload_firmware(const struct qe_f
+@@ -500,7 +516,7 @@ int qe_upload_firmware(const struct qe_f
* If the microcode calls for it, split the I-RAM.
*/
if (!firmware->split)
if (firmware->soc.model)
printk(KERN_INFO
-@@ -521,11 +537,11 @@ int qe_upload_firmware(const struct qe_f
+@@ -534,11 +550,11 @@ int qe_upload_firmware(const struct qe_f
u32 trap = be32_to_cpu(ucode->traps[j]);
if (trap)
}
qe_firmware_uploaded = 1;
-@@ -644,9 +660,9 @@ EXPORT_SYMBOL(qe_get_num_of_risc);
+@@ -657,9 +673,9 @@ EXPORT_SYMBOL(qe_get_num_of_risc);
unsigned int qe_get_num_of_snums(void)
{
struct device_node *qe;
num_of_snums = 28; /* The default number of snum for threads is 28 */
qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
-@@ -660,9 +676,9 @@ unsigned int qe_get_num_of_snums(void)
+@@ -673,9 +689,9 @@ unsigned int qe_get_num_of_snums(void)
return num_of_snums;
}