--- a/arch/arm/boot/dts/mt7629.dtsi
+++ b/arch/arm/boot/dts/mt7629.dtsi
-@@ -272,6 +272,28 @@
+@@ -272,6 +272,22 @@
status = "disabled";
};
-+ bch: ecc@1100e000 {
-+ compatible = "mediatek,mt7622-ecc";
-+ reg = <0x1100e000 0x1000>;
-+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>;
-+ clocks = <&pericfg CLK_PERI_NFIECC_PD>;
-+ clock-names = "nfiecc_clk";
-+ status = "disabled";
-+ };
-+
-+ snfi: spi@1100d000 {
-+ compatible = "mediatek,mt7629-snfi";
-+ reg = <0x1100d000 0x1000>;
++ snand: snfi@1100d000 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&serial_nand_pins>;
++ compatible = "mediatek,mt7629-snand";
++ reg = <0x1100d000 0x1000>, <0x1100e000 0x1000>;
++ reg-names = "nfi", "ecc";
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_NFI_PD>,
-+ <&pericfg CLK_PERI_SNFI_PD>;
-+ clock-names = "nfi_clk", "spi_clk";
-+ ecc-engine = <&bch>;
++ <&pericfg CLK_PERI_SNFI_PD>,
++ <&pericfg CLK_PERI_NFIECC_PD>;
++ clock-names = "nfi_clk", "pad_clk", "ecc_clk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
"mediatek,mt7622-spi";
--- a/arch/arm/boot/dts/mt7629-rfb.dts
+++ b/arch/arm/boot/dts/mt7629-rfb.dts
-@@ -249,6 +249,52 @@
+@@ -254,6 +254,38 @@
};
};
-+&bch {
-+ status = "okay";
-+};
-+
-+&snfi {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&serial_nand_pins>;
++&snand {
+ status = "okay";
++ mediatek,quad-spi;
+
-+ spi_nand@0 {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ compatible = "spi-nand";
-+ spi-max-frequency = <104000000>;
-+ reg = <0>;
-+
-+ partitions {
++ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ label = "firmware";
+ reg = <0x1c0000 0x1000000>;
+ };
-+
-+ };
+ };
+};
+