kernel: bump 5.4 to 5.4.126

[openwrt/openwrt.git] / target / linux / mediatek / patches-5.4 / 1011-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch

diff --git a/target/linux/mediatek/patches-5.4/1011-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch b/target/linux/mediatek/patches-5.4/1011-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
index 18ddd0863ef355e1b3824c1d096a405b233b3df9..e75d76b9cc67f18043a0ad5d538106c4deb52613 100644 (file)
--- a/target/linux/mediatek/patches-5.4/1011-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
+++ b/target/linux/mediatek/patches-5.4/1011-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch
@@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
                        interface-type = "ace";
                        reg = <0x5000 0x1000>;
                };
-@@ -967,6 +967,8 @@
+@@ -969,6 +969,8 @@
                power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
                mediatek,ethsys = <&ethsys>;
                mediatek,sgmiisys = <&sgmiisys>;
@@ -37,7 +37,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
  #include <linux/mfd/syscon.h>
  #include <linux/regmap.h>
  #include <linux/clk.h>
-@@ -2482,6 +2483,13 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -2506,6 +2507,13 @@ static int mtk_hw_init(struct mtk_eth *e
        if (ret)
                goto err_disable_pm;
  
@@ -51,7 +51,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
        if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
                ret = device_reset(eth->dev);
                if (ret) {
-@@ -3080,6 +3088,16 @@ static int mtk_probe(struct platform_dev
+@@ -3104,6 +3112,16 @@ static int mtk_probe(struct platform_dev
                }
        }
  
@@ -70,7 +70,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
                                          GFP_KERNEL);
 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-@@ -435,6 +435,12 @@
+@@ -448,6 +448,12 @@
  #define RSTCTRL_FE            BIT(6)
  #define RSTCTRL_PPE           BIT(31)