--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -1238,7 +1238,7 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -1264,7 +1264,7 @@ static int mtk_init_fq_dma(struct mtk_et
eth->scratch_ring = eth->sram_base;
else
eth->scratch_ring = dma_alloc_coherent(eth->dma_dev,
ð->phy_scratch_ring,
GFP_KERNEL);
if (unlikely(!eth->scratch_ring))
-@@ -1254,16 +1254,16 @@ static int mtk_init_fq_dma(struct mtk_et
+@@ -1280,16 +1280,16 @@ static int mtk_init_fq_dma(struct mtk_et
if (unlikely(dma_mapping_error(eth->dma_dev, dma_addr)))
return -ENOMEM;
txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE);
txd->txd4 = 0;
-@@ -1512,7 +1512,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1538,7 +1538,7 @@ static int mtk_tx_map(struct sk_buff *sk
if (itxd == ring->last_free)
return -ENOMEM;
memset(itx_buf, 0, sizeof(*itx_buf));
txd_info.addr = dma_map_single(eth->dma_dev, skb->data, txd_info.size,
-@@ -1553,7 +1553,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1579,7 +1579,7 @@ static int mtk_tx_map(struct sk_buff *sk
memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
txd_info.size = min_t(unsigned int, frag_size,
txd_info.qid = queue;
txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 &&
!(frag_size - txd_info.size);
-@@ -1566,7 +1566,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1592,7 +1592,7 @@ static int mtk_tx_map(struct sk_buff *sk
mtk_tx_set_dma_desc(dev, txd, &txd_info);
tx_buf = mtk_desc_to_tx_buf(ring, txd,
if (new_desc)
memset(tx_buf, 0, sizeof(*tx_buf));
tx_buf->data = (void *)MTK_DMA_DUMMY_DESC;
-@@ -1609,7 +1609,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1635,7 +1635,7 @@ static int mtk_tx_map(struct sk_buff *sk
} else {
int next_idx;
ring->dma_size);
mtk_w32(eth, next_idx, MT7628_TX_CTX_IDX0);
}
-@@ -1618,7 +1618,7 @@ static int mtk_tx_map(struct sk_buff *sk
+@@ -1644,7 +1644,7 @@ static int mtk_tx_map(struct sk_buff *sk
err_dma:
do {
/* unmap dma */
mtk_tx_unmap(eth, tx_buf, NULL, false);
-@@ -1643,7 +1643,7 @@ static int mtk_cal_txd_req(struct mtk_et
+@@ -1669,7 +1669,7 @@ static int mtk_cal_txd_req(struct mtk_et
for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
frag = &skb_shinfo(skb)->frags[i];
nfrags += DIV_ROUND_UP(skb_frag_size(frag),
}
} else {
nfrags += skb_shinfo(skb)->nr_frags;
-@@ -1784,7 +1784,7 @@ static struct mtk_rx_ring *mtk_get_rx_ri
+@@ -1810,7 +1810,7 @@ static struct mtk_rx_ring *mtk_get_rx_ri
ring = ð->rx_ring[i];
idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
if (rxd->rxd2 & RX_DMA_DONE) {
ring->calc_idx_update = true;
return ring;
-@@ -1952,7 +1952,7 @@ static int mtk_xdp_submit_frame(struct m
+@@ -1978,7 +1978,7 @@ static int mtk_xdp_submit_frame(struct m
}
htxd = txd;
memset(tx_buf, 0, sizeof(*tx_buf));
htx_buf = tx_buf;
-@@ -1971,7 +1971,7 @@ static int mtk_xdp_submit_frame(struct m
+@@ -1997,7 +1997,7 @@ static int mtk_xdp_submit_frame(struct m
goto unmap;
tx_buf = mtk_desc_to_tx_buf(ring, txd,
memset(tx_buf, 0, sizeof(*tx_buf));
n_desc++;
}
-@@ -2009,7 +2009,7 @@ static int mtk_xdp_submit_frame(struct m
+@@ -2035,7 +2035,7 @@ static int mtk_xdp_submit_frame(struct m
} else {
int idx;
mtk_w32(eth, NEXT_DESP_IDX(idx, ring->dma_size),
MT7628_TX_CTX_IDX0);
}
-@@ -2020,7 +2020,7 @@ static int mtk_xdp_submit_frame(struct m
+@@ -2046,7 +2046,7 @@ static int mtk_xdp_submit_frame(struct m
unmap:
while (htxd != txd) {
mtk_tx_unmap(eth, tx_buf, NULL, false);
htxd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU;
-@@ -2151,7 +2151,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -2177,7 +2177,7 @@ static int mtk_poll_rx(struct napi_struc
goto rx_done;
idx = NEXT_DESP_IDX(ring->calc_idx, ring->dma_size);
data = ring->data[idx];
if (!mtk_rx_get_desc(eth, &trxd, rxd))
-@@ -2286,7 +2286,7 @@ static int mtk_poll_rx(struct napi_struc
+@@ -2312,7 +2312,7 @@ static int mtk_poll_rx(struct napi_struc
rxdcsum = &trxd.rxd4;
}
skb->ip_summed = CHECKSUM_UNNECESSARY;
else
skb_checksum_none_assert(skb);
-@@ -2410,7 +2410,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
+@@ -2436,7 +2436,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
break;
tx_buf = mtk_desc_to_tx_buf(ring, desc,
if (!tx_buf->data)
break;
-@@ -2461,7 +2461,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
+@@ -2487,7 +2487,7 @@ static int mtk_poll_tx_pdma(struct mtk_e
}
mtk_tx_unmap(eth, tx_buf, &bq, true);
ring->last_free = desc;
atomic_inc(&ring->free_count);
-@@ -2551,7 +2551,7 @@ static int mtk_napi_rx(struct napi_struc
+@@ -2577,7 +2577,7 @@ static int mtk_napi_rx(struct napi_struc
do {
int rx_done;
reg_map->pdma.irq_status);
rx_done = mtk_poll_rx(napi, budget - rx_done_total, eth);
rx_done_total += rx_done;
-@@ -2567,10 +2567,10 @@ static int mtk_napi_rx(struct napi_struc
+@@ -2593,10 +2593,10 @@ static int mtk_napi_rx(struct napi_struc
return budget;
} while (mtk_r32(eth, reg_map->pdma.irq_status) &
return rx_done_total;
}
-@@ -2579,7 +2579,7 @@ static int mtk_tx_alloc(struct mtk_eth *
+@@ -2605,7 +2605,7 @@ static int mtk_tx_alloc(struct mtk_eth *
{
const struct mtk_soc_data *soc = eth->soc;
struct mtk_tx_ring *ring = ð->tx_ring;
struct mtk_tx_dma_v2 *txd;
int ring_size;
u32 ofs, val;
-@@ -2702,14 +2702,14 @@ static void mtk_tx_clean(struct mtk_eth
+@@ -2728,14 +2728,14 @@ static void mtk_tx_clean(struct mtk_eth
}
if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && ring->dma) {
dma_free_coherent(eth->dma_dev,
ring->dma_pdma, ring->phys_pdma);
ring->dma_pdma = NULL;
}
-@@ -2764,15 +2764,15 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2790,15 +2790,15 @@ static int mtk_rx_alloc(struct mtk_eth *
if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM) ||
rx_flag != MTK_RX_FLAGS_NORMAL) {
ring->dma = dma_alloc_coherent(eth->dma_dev,
}
if (!ring->dma)
-@@ -2783,7 +2783,7 @@ static int mtk_rx_alloc(struct mtk_eth *
+@@ -2809,7 +2809,7 @@ static int mtk_rx_alloc(struct mtk_eth *
dma_addr_t dma_addr;
void *data;
if (ring->page_pool) {
data = mtk_page_pool_get_buff(ring->page_pool,
&dma_addr, GFP_KERNEL);
-@@ -2874,7 +2874,7 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -2900,7 +2900,7 @@ static void mtk_rx_clean(struct mtk_eth
if (!ring->data[i])
continue;
if (!rxd->rxd1)
continue;
-@@ -2891,7 +2891,7 @@ static void mtk_rx_clean(struct mtk_eth
+@@ -2917,7 +2917,7 @@ static void mtk_rx_clean(struct mtk_eth
if (!in_sram && ring->dma) {
dma_free_coherent(eth->dma_dev,
ring->dma, ring->phys);
ring->dma = NULL;
}
-@@ -3254,7 +3254,7 @@ static void mtk_dma_free(struct mtk_eth
+@@ -3280,7 +3280,7 @@ static void mtk_dma_free(struct mtk_eth
netdev_reset_queue(eth->netdev[i]);
if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && eth->scratch_ring) {
dma_free_coherent(eth->dma_dev,
eth->scratch_ring, eth->phy_scratch_ring);
eth->scratch_ring = NULL;
eth->phy_scratch_ring = 0;
-@@ -3304,7 +3304,7 @@ static irqreturn_t mtk_handle_irq_rx(int
+@@ -3330,7 +3330,7 @@ static irqreturn_t mtk_handle_irq_rx(int
eth->rx_events++;
if (likely(napi_schedule_prep(ð->rx_napi))) {
__napi_schedule(ð->rx_napi);
}
-@@ -3330,9 +3330,9 @@ static irqreturn_t mtk_handle_irq(int ir
+@@ -3356,9 +3356,9 @@ static irqreturn_t mtk_handle_irq(int ir
const struct mtk_reg_map *reg_map = eth->soc->reg_map;
if (mtk_r32(eth, reg_map->pdma.irq_mask) &
mtk_handle_irq_rx(irq, _eth);
}
if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) {
-@@ -3350,10 +3350,10 @@ static void mtk_poll_controller(struct n
+@@ -3376,10 +3376,10 @@ static void mtk_poll_controller(struct n
struct mtk_eth *eth = mac->hw;
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
}
#endif
-@@ -3516,7 +3516,7 @@ static int mtk_open(struct net_device *d
+@@ -3545,7 +3545,7 @@ static int mtk_open(struct net_device *d
napi_enable(ð->tx_napi);
napi_enable(ð->rx_napi);
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
refcount_set(ð->dma_refcnt, 1);
}
else
-@@ -3599,7 +3599,7 @@ static int mtk_stop(struct net_device *d
+@@ -3628,7 +3628,7 @@ static int mtk_stop(struct net_device *d
mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
napi_disable(ð->tx_napi);
napi_disable(ð->rx_napi);
-@@ -4075,9 +4075,9 @@ static int mtk_hw_init(struct mtk_eth *e
+@@ -4107,9 +4107,9 @@ static int mtk_hw_init(struct mtk_eth *e
/* FE int grouping */
mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp);
mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
if (mtk_is_netsys_v3_or_greater(eth)) {
-@@ -5175,11 +5175,15 @@ static const struct mtk_soc_data mt2701_
+@@ -5270,11 +5270,15 @@ static const struct mtk_soc_data mt2701_
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,
.version = 1,
.dma_max_len = MTK_TX_DMA_BUF_LEN,
.dma_len_offset = 16,
},
-@@ -5195,11 +5199,15 @@ static const struct mtk_soc_data mt7621_
+@@ -5290,11 +5294,15 @@ static const struct mtk_soc_data mt7621_
.offload_version = 1,
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
.dma_max_len = MTK_TX_DMA_BUF_LEN,
.dma_len_offset = 16,
},
-@@ -5217,11 +5225,15 @@ static const struct mtk_soc_data mt7622_
+@@ -5312,11 +5320,15 @@ static const struct mtk_soc_data mt7622_
.hash_offset = 2,
.has_accounting = true,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
.dma_max_len = MTK_TX_DMA_BUF_LEN,
.dma_len_offset = 16,
},
-@@ -5238,11 +5250,15 @@ static const struct mtk_soc_data mt7623_
+@@ -5333,11 +5345,15 @@ static const struct mtk_soc_data mt7623_
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
.disable_pll_modes = true,
.dma_max_len = MTK_TX_DMA_BUF_LEN,
.dma_len_offset = 16,
},
-@@ -5257,11 +5273,15 @@ static const struct mtk_soc_data mt7629_
+@@ -5352,11 +5368,15 @@ static const struct mtk_soc_data mt7629_
.required_pctl = false,
.has_accounting = true,
.version = 1,
.dma_max_len = MTK_TX_DMA_BUF_LEN,
.dma_len_offset = 16,
},
-@@ -5279,11 +5299,15 @@ static const struct mtk_soc_data mt7981_
+@@ -5374,11 +5394,15 @@ static const struct mtk_soc_data mt7981_
.hash_offset = 4,
.has_accounting = true,
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
.dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
.dma_len_offset = 8,
},
-@@ -5301,11 +5325,15 @@ static const struct mtk_soc_data mt7986_
+@@ -5396,11 +5420,15 @@ static const struct mtk_soc_data mt7986_
.hash_offset = 4,
.has_accounting = true,
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
.dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
.dma_len_offset = 8,
},
-@@ -5323,11 +5351,15 @@ static const struct mtk_soc_data mt7988_
+@@ -5418,11 +5446,15 @@ static const struct mtk_soc_data mt7988_
.hash_offset = 4,
.has_accounting = true,
.foe_entry_size = MTK_FOE_ENTRY_V3_SIZE,
.dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
.dma_len_offset = 8,
},
-@@ -5340,11 +5372,15 @@ static const struct mtk_soc_data rt5350_
+@@ -5435,11 +5467,15 @@ static const struct mtk_soc_data rt5350_
.required_clks = MT7628_CLKS_BITMAP,
.required_pctl = false,
.version = 1,
},
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-@@ -326,8 +326,8 @@
+@@ -327,8 +327,8 @@
/* QDMA descriptor txd3 */
#define TX_DMA_OWNER_CPU BIT(31)
#define TX_DMA_LS0 BIT(30)
#define TX_DMA_SWC BIT(14)
#define TX_DMA_PQID GENMASK(3, 0)
#define TX_DMA_ADDR64_MASK GENMASK(3, 0)
-@@ -347,8 +347,8 @@
+@@ -348,8 +348,8 @@
/* QDMA descriptor rxd2 */
#define RX_DMA_DONE BIT(31)
#define RX_DMA_LSO BIT(30)
#define RX_DMA_VTAG BIT(15)
#define RX_DMA_ADDR64_MASK GENMASK(3, 0)
#if IS_ENABLED(CONFIG_64BIT)
-@@ -1279,10 +1279,9 @@ struct mtk_reg_map {
+@@ -1209,10 +1209,9 @@ struct mtk_reg_map {
* @foe_entry_size Foe table entry size.
* @has_accounting Bool indicating support for accounting of
* offloaded flows.
* @dma_max_len Max DMA tx/rx buffer length.
* @dma_len_offset Tx/Rx DMA length field offset.
*/
-@@ -1300,13 +1299,17 @@ struct mtk_soc_data {
+@@ -1230,13 +1229,17 @@ struct mtk_soc_data {
bool has_accounting;
bool disable_pll_modes;
struct {