/dts-v1/;
-/include/ "mt7620a.dtsi"
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
/ {
compatible = "dlink,dir-810l", "ralink,mt7620a-soc";
model = "D-Link DIR-810L";
- palmbus@10000000 {
- spi@b00 {
- status = "okay";
-
- m25p80@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mx25l6405d";
- reg = <0 0>;
- linux,modalias = "m25p80";
- spi-max-frequency = <10000000>;
-
- partition@0 {
- label = "u-boot";
- reg = <0x0 0x30000>;
- read-only;
- };
-
- partition@30000 {
- label = "u-boot-env";
- reg = <0x30000 0x10000>;
- read-only;
- };
-
- factory: partition@40000 {
- label = "factory";
- reg = <0x40000 0x10000>;
- read-only;
- };
-
- factory5g: partition@50000 {
- label = "factory5g";
- reg = <0x50000 0x10000>;
- read-only;
- };
-
- partition@60000 {
- label = "Wolf_Config";
- reg = <0x60000 0x10000>;
- read-only;
- };
-
- partition@70000 {
- label = "MyDlink";
- reg = <0x70000 0x80000>;
- read-only;
- };
-
- partition@e0000 {
- label = "Jffs2";
- reg = <0xe0000 0x80000>;
- read-only;
- };
-
- partition@170000 {
- label = "firmware";
- reg = <0x170000 0x690000>;
- };
- };
- };
- };
-
- pinctrl {
- state_default: pinctrl0 {
- gpio {
- ralink,group = "jtag", "mdio", "rgmii1", "rgmii1", "i2c", "wled", "uartf";
- ralink,function = "gpio";
- };
- };
- };
-
- gsw@10110000 {
- ralink,port4 = "ephy";
-
- pinctrl-names = "default";
- pinctrl-0 = <&ephy_pins>;
+ aliases {
+ led-boot = &led_power_green;
+ led-failsafe = &led_power_green;
+ led-running = &led_power_green;
+ led-upgrade = &led_power_green;
};
- pcie@10140000 {
- status = "okay";
- };
-
- gpio-keys-polled {
+ keys {
compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
poll-interval = <20>;
+
reset {
label = "reset";
- gpios = <&gpio0 1 1>;
- linux,code = <0x100>;
+ gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+ linux,code = <BTN_0>;
};
+
wps {
label = "wps";
- gpios = <&gpio0 2 1>;
- linux,code = <0x100>;
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ linux,code = <BTN_0>;
};
};
- gpio-leds {
+ leds {
compatible = "gpio-leds";
- power {
- label = "dlink:green:power";
- gpios = <&gpio0 9 0>;
+
+ led_power_green: power {
+ label = "dir-810l:green:power";
+ gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ wan {
+ label = "dir-810l:orange:wan";
+ gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
};
- internet {
- label = "asus:yellow:internet";
- gpios = <&gpio0 12 0>;
+
+ power2 {
+ label = "dir-810l:orange:power";
+ gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ m25p80@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x30000>;
+ read-only;
+ };
+
+ partition@30000 {
+ label = "u-boot-env";
+ reg = <0x30000 0x10000>;
+ read-only;
+ };
+
+ factory: partition@40000 {
+ label = "factory";
+ reg = <0x40000 0x10000>;
+ read-only;
+ };
+
+ factory5g: partition@50000 {
+ label = "factory5g";
+ reg = <0x50000 0x10000>;
+ read-only;
+ };
+
+ partition@60000 {
+ label = "Wolf_Config";
+ reg = <0x60000 0x10000>;
+ read-only;
+ };
+
+ partition@70000 {
+ label = "MyDlink";
+ reg = <0x70000 0x80000>;
+ read-only;
+ };
+
+ partition@e0000 {
+ label = "Jffs2";
+ reg = <0xe0000 0x80000>;
+ read-only;
+ };
+
+ partition@170000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x170000 0x690000>;
+ };
};
- status {
- label = "asus:internet:status";
- gpios = <&gpio0 13 0>;
+ };
+};
+
+&pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+ ralink,group = "mdio", "rgmii1", "i2c", "wled", "uartf";
+ ralink,function = "gpio";
};
};
};
+
+ðernet {
+ mtd-mac-address = <&factory 0x28>;
+ mediatek,portmap = "llllw";
+};
+
+&gsw {
+ mediatek,port4 = "ephy";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ephy_pins>;
+};
+
+&pcie {
+ status = "okay";
+};
+
+&wmac {
+ ralink,mtd-eeprom = <&factory 0x0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pa_pins>;
+ mtd-mac-address = <&factory 0x28>;
+};
+
+&pcie0 {
+ wifi@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&factory 0x28>;
+ mtd-mac-address-increment = <2>;
+ };
+};