ramips: fix dtc warnings

[openwrt/openwrt.git] / target / linux / ramips / dts / FIREWRT.dts

diff --git a/target/linux/ramips/dts/FIREWRT.dts b/target/linux/ramips/dts/FIREWRT.dts
index d38ee39bd906edd464d21d9e9ea2d762a0810b35..4fbb2a27070dc1c02f268ad0e152c140579a6717 100644 (file)
--- a/target/linux/ramips/dts/FIREWRT.dts
+++ b/target/linux/ramips/dts/FIREWRT.dts
@@ -2,12 +2,17 @@
 
 #include "mt7621.dtsi"
 
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
 / {
        compatible = "firefly,firewrt", "mediatek,mt7621-soc";
        model = "Firefly FireWRT";
 
+       aliases {
+               led-status = &led_power;
+       };
+
        memory@0 {
                device_type = "memory";
                reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
@@ -20,27 +25,25 @@
        gpio-leds {
                compatible = "gpio-leds";
 
-               power {
+               led_power: power {
                        label = "firewrt:green:power";
-                       gpios = <&gpio0 22 1>;
+                       gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
                };
        };
 
        gpio-keys-polled {
                compatible = "gpio-keys-polled";
-               #address-cells = <1>;
-               #size-cells = <0>;
                poll-interval = <20>;
 
                wps {
                        label = "wps";
-                       gpios = <&gpio0 18 1>;
+                       gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_WPS_BUTTON>;
                };
 
                power {
                        label = "power";
-                       gpios = <&gpio0 23 1>;
+                       gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
                        linux,code = <KEY_POWER>;
                };
        };
@@ -88,23 +91,21 @@
 
 &pcie {
        status = "okay";
+};
 
-       pcie0 {
-               mt76@0,0 {
-                       reg = <0x0000 0 0 0 0>;
-                       device_type = "pci";
-                       mediatek,mtd-eeprom = <&factory 0x8000>;
-                       ieee80211-freq-limit = <5000000 6000000>;
-               };
+&pcie0 {
+       mt76@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x8000>;
+               ieee80211-freq-limit = <5000000 6000000>;
        };
+};
 
-       pcie1 {
-               mt76@1,0 {
-                       reg = <0x0000 0 0 0 0>;
-                       device_type = "pci";
-                       mediatek,mtd-eeprom = <&factory 0x0000>;
-                       ieee80211-freq-limit = <2400000 2500000>;
-               };
+&pcie1 {
+       mt76@0,0 {
+               reg = <0x0000 0 0 0 0>;
+               mediatek,mtd-eeprom = <&factory 0x0000>;
+               ieee80211-freq-limit = <2400000 2500000>;
        };
 };