ramips: fix Ubiquiti EdgeRouter X's MAC address for gmac1

[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a.dtsi

diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index 150c0e14ca2d1c3f4bf8f5f2c995da70223a5bcb..4b6fa60dc8b72ea8b89a5fae53b83c44f487b4e5 100644 (file)
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -1,8 +1,16 @@
+/dts-v1/;
+
 / {
        #address-cells = <1>;
        #size-cells = <1>;
        compatible = "ralink,mt7620a-soc";
 
+       aliases {
+               spi0 = &spi0;
+               spi1 = &spi1;
+               serial0 = &uartlite;
+       };
+
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
@@ -24,12 +32,6 @@
                compatible = "mti,cpu-interrupt-controller";
        };
 
-       aliases {
-               spi0 = &spi0;
-               spi1 = &spi1;
-               serial0 = &uartlite;
-       };
-
        palmbus: palmbus@10000000 {
                compatible = "palmbus";
                reg = <0x10000000 0x200000>;
@@ -115,8 +117,8 @@
                        gpio-controller;
                        #gpio-cells = <2>;
 
+                       ngpios = <24>;
                        ralink,gpio-base = <0>;
-                       ralink,nr-gpio = <24>;
                        ralink,register-map = [ 00 04 08 0c
                                                20 24 28 2c
                                                30 34 ];
@@ -132,8 +134,8 @@
                        gpio-controller;
                        #gpio-cells = <2>;
 
+                       ngpios = <16>;
                        ralink,gpio-base = <24>;
-                       ralink,nr-gpio = <16>;
                        ralink,register-map = [ 00 04 08 0c
                                                10 14 18 1c
                                                20 24 ];
@@ -151,8 +153,8 @@
                        gpio-controller;
                        #gpio-cells = <2>;
 
+                       ngpios = <32>;
                        ralink,gpio-base = <40>;
-                       ralink,nr-gpio = <32>;
                        ralink,register-map = [ 00 04 08 0c
                                                10 14 18 1c
                                                20 24 ];
@@ -170,8 +172,8 @@
                        gpio-controller;
                        #gpio-cells = <2>;
 
+                       ngpios = <1>;
                        ralink,gpio-base = <72>;
-                       ralink,nr-gpio = <1>;
                        ralink,register-map = [ 00 04 08 0c
                                                10 14 18 1c
                                                20 24 ];
@@ -315,113 +317,120 @@
 
                pcm_i2s_pins: pcm_i2s {
                        pcm_i2s {
-                               ralink,group = "uartf";
-                               ralink,function = "pcm i2s";
+                               groups = "uartf";
+                               function = "pcm i2s";
                        };
                };
 
                uartf_gpio_pins: uartf_gpio {
                        uartf_gpio {
-                               ralink,group = "uartf";
-                               ralink,function = "gpio uartf";
+                               groups = "uartf";
+                               function = "gpio uartf";
                        };
                };
 
                gpio_i2s_pins: gpio_i2s {
                        gpio_i2s {
-                               ralink,group = "uartf";
-                               ralink,function = "gpio i2s";
+                               groups = "uartf";
+                               function = "gpio i2s";
                        };
                };
 
                spi_pins: spi_pins {
                        spi_pins {
-                               ralink,group = "spi";
-                               ralink,function = "spi";
+                               groups = "spi";
+                               function = "spi";
                        };
                };
 
                spi_cs1: spi1 {
                        spi1 {
-                               ralink,group = "spi refclk";
-                               ralink,function = "spi refclk";
+                               groups = "spi refclk";
+                               function = "spi refclk";
                        };
                };
 
                i2c_pins: i2c_pins {
                        i2c_pins {
-                               ralink,group = "i2c";
-                               ralink,function = "i2c";
+                               groups = "i2c";
+                               function = "i2c";
                        };
                };
 
                uartlite_pins: uartlite {
                        uart {
-                               ralink,group = "uartlite";
-                               ralink,function = "uartlite";
+                               groups = "uartlite";
+                               function = "uartlite";
                        };
                };
 
                mdio_pins: mdio {
                        mdio {
-                               ralink,group = "mdio";
-                               ralink,function = "mdio";
+                               groups = "mdio";
+                               function = "mdio";
                        };
                };
 
                mdio_refclk_pins: mdio_refclk {
                        mdio_refclk {
-                               ralink,group = "mdio";
-                               ralink,function = "refclk";
+                               groups = "mdio";
+                               function = "refclk";
                        };
                };
 
                ephy_pins: ephy {
                        ephy {
-                               ralink,group = "ephy";
-                               ralink,function = "ephy";
+                               groups = "ephy";
+                               function = "ephy";
                        };
                };
 
                wled_pins: wled {
                        wled {
-                               ralink,group = "wled";
-                               ralink,function = "wled";
+                               groups = "wled";
+                               function = "wled";
                        };
                };
 
                rgmii1_pins: rgmii1 {
                        rgmii1 {
-                               ralink,group = "rgmii1";
-                               ralink,function = "rgmii1";
+                               groups = "rgmii1";
+                               function = "rgmii1";
                        };
                };
 
                rgmii2_pins: rgmii2 {
                        rgmii2 {
-                               ralink,group = "rgmii2";
-                               ralink,function = "rgmii2";
+                               groups = "rgmii2";
+                               function = "rgmii2";
                        };
                };
 
                pcie_pins: pcie {
                        pcie {
-                               ralink,group = "pcie";
-                               ralink,function = "pcie rst";
+                               groups = "pcie";
+                               function = "pcie rst";
                        };
                };
 
                pa_pins: pa {
                        pa {
-                               ralink,group = "pa";
-                               ralink,function = "pa";
+                               groups = "pa";
+                               function = "pa";
+                       };
+               };
+
+               pa_gpio_pins: pa_gpio {
+                       pa {
+                               groups = "pa";
+                               function = "gpio";
                        };
                };
 
                sdhci_pins: sdhci {
                        sdhci {
-                               ralink,group = "nd_sd";
-                               ralink,function = "sd";
+                               groups = "nd_sd";
+                               function = "sd";
                        };
                };
        };