ramips: add mt7620/1 sdhci pinmux
[openwrt/staging/mkresin.git] / target / linux / ramips / dts / mt7620a.dtsi
index 83ff102745e6ec9d022928ab21f543e2bb95319d..a242684fd891ede36c55aef792b26a0edd52107b 100644 (file)
@@ -1,11 +1,15 @@
 / {
        #address-cells = <1>;
        #size-cells = <1>;
-       compatible = "ralink,mtk7620a-soc";
+       compatible = "ralink,mt7620a-soc";
 
        cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
                cpu@0 {
                        compatible = "mips,mips24KEc";
+                       reg = <0>;
                };
        };
 
@@ -13,7 +17,7 @@
                bootargs = "console=ttyS0,57600";
        };
 
-       cpuintc: cpuintc@0 {
+       cpuintc: cpuintc {
                #address-cells = <0>;
                #interrupt-cells = <1>;
                interrupt-controller;
                        #gpio-cells = <2>;
 
                        ralink,gpio-base = <0>;
-                       ralink,num-gpios = <24>;
+                       ralink,nr-gpio = <24>;
                        ralink,register-map = [ 00 04 08 0c
                                                20 24 28 2c
                                                30 34 ];
                        #gpio-cells = <2>;
 
                        ralink,gpio-base = <24>;
-                       ralink,num-gpios = <16>;
+                       ralink,nr-gpio = <16>;
                        ralink,register-map = [ 00 04 08 0c
                                                10 14 18 1c
                                                20 24 ];
                        #gpio-cells = <2>;
 
                        ralink,gpio-base = <40>;
-                       ralink,num-gpios = <32>;
+                       ralink,nr-gpio = <32>;
                        ralink,register-map = [ 00 04 08 0c
                                                10 14 18 1c
                                                20 24 ];
                        #gpio-cells = <2>;
 
                        ralink,gpio-base = <72>;
-                       ralink,num-gpios = <1>;
+                       ralink,nr-gpio = <1>;
                        ralink,register-map = [ 00 04 08 0c
                                                10 14 18 1c
                                                20 24 ];
 
                spi_cs1: spi1 {
                        spi1 {
-                               ralink,group = "spi_cs1";
-                               ralink,function = "spi_cs1";
+                               ralink,group = "spi refclk";
+                               ralink,function = "spi refclk";
                        };
                };
 
                                ralink,function = "pa";
                        };
                };
+
+               sdhci_pins: sdhci {
+                       sdhci {
+                               ralink,group = "nd_sd";
+                               ralink,function = "sd";
+                       };
+               };
        };
 
        rstctrl: rstctrl {
                interrupt-parent = <&intc>;
                interrupts = <14>;
 
+               pinctrl-names = "default";
+               pinctrl-0 = <&sdhci_pins>;
+
                status = "disabled";
        };
 
 
                status = "disabled";
 
-               pcie-bridge {
+               pcie0: pcie@0,0 {
                        reg = <0x0000 0 0 0 0>;
 
                        #address-cells = <3>;
                        #size-cells = <2>;
 
                        device_type = "pci";
+
+                       ranges;
                };
        };