ramips: add support for TP-Link Archer C5 v4
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_cameo_810.dtsi
index 8ab166d283b17550bcb0a8817f7a5889b113d6a1..2ca25d217964bb25116f3c0d846265d228652ded 100644 (file)
@@ -1,11 +1,20 @@
-//SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
 
 / {
+       aliases {
+               label-mac-device = &ethernet;
+               led-boot = &led_power_green;
+               led-failsafe = &led_power_green;
+               led-running = &led_power_green;
+               led-upgrade = &led_power_green;
+       };
+
        keys {
                compatible = "gpio-keys";
 
                        linux,code = <KEY_WPS_BUTTON>;
                };
        };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led_power_green: power_green {
+                       function = LED_FUNCTION_POWER;
+                       color = <LED_COLOR_ID_GREEN>;
+                       gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_orange {
+                       function = LED_FUNCTION_WAN;
+                       color = <LED_COLOR_ID_ORANGE>;
+                       gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+               };
+
+               wan_green {
+                       function = LED_FUNCTION_WAN;
+                       color = <LED_COLOR_ID_GREEN>;
+                       gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+               };
+
+               power_orange {
+                       function = LED_FUNCTION_POWER;
+                       color = <LED_COLOR_ID_ORANGE>;
+                       gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+               };
+       };
 };
 
 &spi0 {
                                read-only;
                        };
 
-                       factory: partition@40000 {
+                       partition@40000 {
                                label = "factory";
                                reg = <0x40000 0x10000>;
                                read-only;
+
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       eeprom_factory_0: eeprom@0 {
+                                               reg = <0x0 0x200>;
+                                       };
+
+                                       eeprom_factory_8000: eeprom@8000 {
+                                               reg = <0x8000 0x200>;
+                                       };
+
+                                       macaddr_factory_28: macaddr@28 {
+                                               compatible = "mac-base";
+                                               reg = <0x28 0x6>;
+                                               #nvmem-cell-cells = <1>;
+                                       };
+                               };
                        };
 
-                       factory5g: partition@50000 {
+                       partition@50000 {
                                label = "factory5g";
                                reg = <0x50000 0x10000>;
                                read-only;
        };
 };
 
+&state_default {
+       gpio {
+               groups = "i2c", "uartf", "ephy";
+               function = "gpio";
+       };
+};
+
 &ethernet {
-       mtd-mac-address = <&factory 0x28>;
+       nvmem-cells = <&macaddr_factory_28 0>;
+       nvmem-cell-names = "mac-address";
 
        mediatek,portmap = "llllw";
 };
 
+&gpio2 {
+       status = "okay";
+};
+
 &wmac {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "pa_gpio";
        pinctrl-0 = <&pa_pins>;
-
-       ralink,mtd-eeprom = <&factory 0x0>;
-       mtd-mac-address = <&factory 0x28>;
+       pinctrl-1 = <&pa_gpio_pins>;
+       nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_28 0>;
+       nvmem-cell-names = "eeprom", "mac-address";
 };
 
 &pcie {
 &pcie0 {
        wifi@0,0 {
                reg = <0x0000 0 0 0 0>;
-               mediatek,mtd-eeprom = <&factory 0x8000>;
                ieee80211-freq-limit = <5000000 6000000>;
-               mtd-mac-address = <&factory 0x28>;
-               mtd-mac-address-increment = <2>;
+               nvmem-cells = <&eeprom_factory_8000>, <&macaddr_factory_28 2>;
+               nvmem-cell-names = "eeprom", "mac-address";
        };
 };