ramips: add support for SNR-CPE-ME2-SFP
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_zbtlink_zbt-ape522ii.dts
index 4aa404542f6290166b346359ad65cbdd2517c60d..ceb348e1d24e6b4b3cf4ffb99188204060fe1b17 100644 (file)
@@ -1,5 +1,3 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
                compatible = "gpio-leds";
 
                sys1 {
-                       label = "zbt-ape522ii:green:sys1";
+                       label = "green:sys1";
                        gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
                };
 
                sys2 {
-                       label = "zbt-ape522ii:green:sys2";
+                       label = "green:sys2";
                        gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
                };
 
                sys3 {
-                       label = "zbt-ape522ii:green:sys3";
+                       label = "green:sys3";
                        gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
                };
 
                sys4 {
-                       label = "zbt-ape522ii:green:sys4";
+                       label = "green:sys4";
                        gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
                };
 
                wlan2g4 {
-                       label = "zbt-ape522ii:green:wlan2g4";
+                       label = "green:wlan2g4";
                        gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
                };
        };
        };
 };
 
-&gpio0 {
-       status = "okay";
-};
-
-&gpio1 {
-       status = "okay";
-};
-
-&gpio2 {
-       status = "okay";
-};
-
 &gpio3 {
        status = "okay";
 };
        pinctrl-names = "default";
        pinctrl-0 = <&ephy_pins>;
 
-       mtd-mac-address = <&factory 0x4>;
+       nvmem-cells = <&macaddr_factory_4>;
+       nvmem-cell-names = "mac-address";
 
-       mediatek,portmap = "wllll";
+       mediatek,portmap = "llllw";
 };
 
 &wmac {
        ralink,mtd-eeprom = <&factory 0x0>;
-       pinctrl-names = "default";
+
+       pinctrl-names = "default", "pa_gpio";
        pinctrl-0 = <&pa_pins>;
+       pinctrl-1 = <&pa_gpio_pins>;
 };
 
 &pcie {
                function = "gpio";
        };
 };
+
+&factory {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_factory_4: macaddr@4 {
+               reg = <0x4 0x6>;
+       };
+};