ramips: dts: rt3050: reset FE and ESW cores together
[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_zbtlink_zbt-we826.dtsi
index 41c6b07dbd080bee87c307ccc1141ffa32e7fd70..b3032af63f388e33785745d9f472971e783704f6 100644 (file)
                compatible = "gpio-leds";
 
                led_power: power {
-                       label = "zbt-we826:green:power";
+                       label = "green:power";
                        gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
                };
 
                usb {
-                       label = "zbt-we826:green:usb";
+                       label = "green:usb";
                        gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
                        trigger-sources = <&ohci_port1>, <&ehci_port1>;
                        linux,default-trigger = "usbport";
                };
 
                air {
-                       label = "zbt-we826:green:wifi";
+                       label = "green:wifi";
                        gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
                };
        };
        };
 };
 
-&gpio0 {
+&spi0 {
        status = "okay";
+
+       flash0: flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <10000000>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       partition@0 {
+                               label = "u-boot";
+                               reg = <0x0 0x30000>;
+                               read-only;
+                       };
+
+                       partition@30000 {
+                               label = "u-boot-env";
+                               reg = <0x30000 0x10000>;
+                               read-only;
+                       };
+
+                       factory: partition@40000 {
+                               label = "factory";
+                               reg = <0x40000 0x10000>;
+                               read-only;
+
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       eeprom_factory_0: eeprom@0 {
+                                               reg = <0x0 0x200>;
+                                       };
+
+                                       macaddr_factory_4: macaddr@4 {
+                                               reg = <0x4 0x6>;
+                                       };
+                               };
+                       };
+
+                       firmware: partition@50000 {
+                               compatible = "denx,uimage";
+                               label = "firmware";
+                               /* reg property is set based on flash size in DTS files */
+                       };
+               };
+       };
 };
 
 &gpio1 {
 };
 
 &ethernet {
-       mtd-mac-address = <&factory 0x4>;
-       mediatek,portmap = "wllll";
+       nvmem-cells = <&macaddr_factory_4>;
+       nvmem-cell-names = "mac-address";
+
+       mediatek,portmap = "llllw";
 };
 
 &wmac {
-       ralink,mtd-eeprom = <&factory 0>;
+       nvmem-cells = <&eeprom_factory_0>;
+       nvmem-cell-names = "eeprom";
 };
 
-&pinctrl {
-       state_default: pinctrl0 {
-               default {
-                       ralink,group = "i2c", "uartf", "wled", "spi refclk", "pa";
-                       ralink,function = "gpio";
-               };
+&state_default {
+       default {
+               groups = "i2c", "uartf", "wled", "spi refclk", "pa";
+               function = "gpio";
        };
 };