flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
- spi-max-frequency = <80000000>;
- m25p,fast-read;
+ spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
};
factory: partition@40000 {
+ compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
read-only;
+
+ eeprom_factory_0: eeprom@0 {
+ reg = <0x0 0x4da8>;
+ };
+
+ macaddr_factory_4: macaddr@4 {
+ reg = <0x4 0x6>;
+ };
+
+ macaddr_factory_e000: macaddr@e000 {
+ reg = <0xe000 0x6>;
+ };
+
+ macaddr_factory_e006: macaddr@e006 {
+ reg = <0xe006 0x6>;
+ };
};
partition@50000 {
};
&pcie0 {
- mt76@0,0 {
+ wifi@0,0 {
+ compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
- mediatek,mtd-eeprom = <&factory 0x0>;
+
+ /* 5 GHz (phy1) does not take the address from calibration data,
+ but setting it manually here works */
+ nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_4>;
+ nvmem-cell-names = "eeprom", "mac-address";
};
};
nvmem-cell-names = "mac-address";
};
+&gmac1 {
+ status = "okay";
+ label = "wan";
+ phy-handle = <ðphy4>;
+
+ nvmem-cells = <&macaddr_factory_e006>;
+ nvmem-cell-names = "mac-address";
+};
+
+&mdio {
+ ethphy4: ethernet-phy@4 {
+ reg = <4>;
+ };
+};
+
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan4";
};
-
- port@4 {
- status = "okay";
- label = "wan";
- nvmem-cells = <&macaddr_factory_e006>;
- nvmem-cell-names = "mac-address";
- };
};
};
function = "gpio";
};
};
-
-&factory {
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
-
- macaddr_factory_e000: macaddr@e000 {
- reg = <0xe000 0x6>;
- };
-
- macaddr_factory_e006: macaddr@e006 {
- reg = <0xe006 0x6>;
- };
-};