#address-cells = <1>;
#size-cells = <1>;
- sysc: sysc@0 {
- compatible = "ralink,rt2880-sysc";
- reg = <0x000 0x100>;
+ sysc: syscon@0 {
+ compatible = "ralink,rt2880-sysc", "syscon";
+ reg = <0x0 0x100>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
};
timer: timer@100 {
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
+ clocks = <&sysc 3>;
+
interrupt-parent = <&intc>;
interrupts = <1>;
watchdog: watchdog@120 {
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
+
+ clocks = <&sysc 4>;
};
intc: intc@200 {
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
- resets = <&rstctrl 9>;
+ clocks = <&sysc 6>;
+
+ resets = <&sysc 9>;
reset-names = "i2c";
#address-cells = <1>;
compatible = "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
+ clocks = <&sysc 7>;
+
interrupt-parent = <&intc>;
interrupts = <8>;
};
};
- rstctrl: rstctrl {
- compatible = "ralink,rt2880-reset";
- #reset-cells = <1>;
- };
-
- clkctrl: clkctrl {
- compatible = "ralink,rt2880-clock";
- #clock-cells = <1>;
- };
-
pci: pci@440000 {
compatible = "ralink,rt288x-pci";
reg = <0x00440000 0x20000>;
#address-cells = <1>;
#size-cells = <0>;
- resets = <&rstctrl 18>;
+ clocks = <&sysc 8>;
+
+ resets = <&sysc 18>;
reset-names = "fe";
interrupt-parent = <&cpuintc>;
compatible = "ralink,rt2880-wmac";
reg = <0x480000 0x40000>;
+ clocks = <&sysc 9>;
+
interrupt-parent = <&cpuintc>;
interrupts = <6>;