Remove more inaccurate compatible strings from various clock controllers
of the MT7981 SoC.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
};
apmixedsys: apmixedsys@1001E000 {
};
apmixedsys: apmixedsys@1001E000 {
- compatible = "mediatek,mt7981-apmixedsys", "mediatek,mt7986-apmixedsys", "syscon";
+ compatible = "mediatek,mt7981-apmixedsys", "syscon";
reg = <0 0x1001E000 0 0x1000>;
#clock-cells = <1>;
};
reg = <0 0x1001E000 0 0x1000>;
#clock-cells = <1>;
};
};
sgmiisys0: syscon@10060000 {
};
sgmiisys0: syscon@10060000 {
- compatible = "mediatek,mt7981-sgmiisys_0", "mediatek,mt7986-sgmiisys_0", "syscon";
+ compatible = "mediatek,mt7981-sgmiisys_0", "syscon";
reg = <0 0x10060000 0 0x1000>;
mediatek,pnswap;
#clock-cells = <1>;
};
sgmiisys1: syscon@10070000 {
reg = <0 0x10060000 0 0x1000>;
mediatek,pnswap;
#clock-cells = <1>;
};
sgmiisys1: syscon@10070000 {
- compatible = "mediatek,mt7981-sgmiisys_1", "mediatek,mt7986-sgmiisys_1", "syscon";
+ compatible = "mediatek,mt7981-sgmiisys_1", "syscon";
reg = <0 0x10070000 0 0x1000>;
#clock-cells = <1>;
};
reg = <0 0x10070000 0 0x1000>;
#clock-cells = <1>;
};