- /*
- Disable interrupts and clear pending
- */
- REG(ECR_OFFSET(0)) = 0xffffffff;
- REG(ECR_OFFSET(32)) = 0xff;
- REG(SEC_ECR_OFFSET) = 0xffffffff;
- REG(CR_OFFSET(0)) = 0xffffffff;
- REG(CR_OFFSET(32)) = 0xff;
- REG(SEC_CR_OFFSET) = 0xffffffff;
+ /*
+ * Disable interrupts and clear pending
+ */
+ writel(0xffffffff, REG(ECR_OFFSET(0)));
+ writel(0xff, REG(ECR_OFFSET(32)));
+ writel(0xffffffff, REG(SEC_ECR_OFFSET));
+ writel(0xffffffff, REG(CR_OFFSET(0)));
+ writel(0xff, REG(CR_OFFSET(32)));
+ writel(0xffffffff, REG(SEC_CR_OFFSET));