- u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
- u8 tmpmac[ETH_ALEN];
-
- ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
- ath79_register_spi(&gl_ar300m_spi_data, gl_ar300m_spi_info, 2);
-
- /* register gpio LEDs and keys */
- ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar300m_leds_gpio),
- gl_ar300m_leds_gpio);
- ath79_register_gpio_keys_polled(-1, GL_AR300M_KEYS_POLL_INTERVAL,
- ARRAY_SIZE(gl_ar300m_gpio_keys),
- gl_ar300m_gpio_keys);
-
- ath79_register_mdio(0, 0x0);
-
- /* WAN */
- ath79_init_mac(ath79_eth0_data.mac_addr, art + GL_AR300M_MAC0_OFFSET, 0);
- ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
- ath79_eth0_data.speed = SPEED_100;
- ath79_eth0_data.duplex = DUPLEX_FULL;
- ath79_eth0_data.phy_mask = BIT(4);
- ath79_register_eth(0);
-
- /* LAN */
- ath79_init_mac(ath79_eth1_data.mac_addr, art + GL_AR300M_MAC1_OFFSET, 0);
- ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
- ath79_eth1_data.speed = SPEED_1000;
- ath79_eth1_data.duplex = DUPLEX_FULL;
- ath79_switch_data.phy_poll_mask |= BIT(4);
- ath79_switch_data.phy4_mii_en = 1;
- ath79_register_eth(1);
-
- ath79_init_mac(tmpmac, art + GL_AR300M_WMAC_CALDATA_OFFSET + 2, 0);
- ath79_register_wmac(art + GL_AR300M_WMAC_CALDATA_OFFSET, tmpmac);
-
- /* enable usb */
- ath79_register_usb();
- /* enable pci */
- ath79_register_pci();
+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+ u8 tmpmac[ETH_ALEN];
+
+ ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
+ ath79_register_spi(&gl_ar300m_spi_data, gl_ar300m_spi_info, 2);
+
+ /* register gpio LEDs and keys */
+ ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_ar300m_leds_gpio),
+ gl_ar300m_leds_gpio);
+ ath79_register_gpio_keys_polled(-1, GL_AR300M_KEYS_POLL_INTERVAL,
+ ARRAY_SIZE(gl_ar300m_gpio_keys),
+ gl_ar300m_gpio_keys);
+
+ ath79_register_mdio(0, 0x0);
+
+ /* WAN */
+ ath79_init_mac(ath79_eth0_data.mac_addr, art + GL_AR300M_MAC0_OFFSET, 0);
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
+ ath79_eth0_data.speed = SPEED_100;
+ ath79_eth0_data.duplex = DUPLEX_FULL;
+ ath79_eth0_data.phy_mask = BIT(4);
+ ath79_register_eth(0);
+
+ /* LAN */
+ ath79_init_mac(ath79_eth1_data.mac_addr, art + GL_AR300M_MAC1_OFFSET, 0);
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
+ ath79_eth1_data.speed = SPEED_1000;
+ ath79_eth1_data.duplex = DUPLEX_FULL;
+ ath79_switch_data.phy_poll_mask |= BIT(4);
+ ath79_switch_data.phy4_mii_en = 1;
+ ath79_register_eth(1);
+
+ ath79_init_mac(tmpmac, art + GL_AR300M_WMAC_CALDATA_OFFSET + 2, 0);
+ ath79_register_wmac(art + GL_AR300M_WMAC_CALDATA_OFFSET, tmpmac);
+
+ /* enable usb */
+ ath79_register_usb();
+ /* enable pci */
+ ath79_register_pci();