The PHY driver needs to read a register containing the values of the
bootstrap pins (which happen to be the PHY LEDs) to determine the LED
polarities. Allow regmap access to first pinctrl bank by adding the
'syscon' compatible, and reference the pinctrl in the MDIO bus where
the PHY driver will look for it.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
mdio {
#address-cells = <1>;
#size-cells = <0>;
+ mediatek,pio = <&pio>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
};
pio: pinctrl@1001f000 {
- compatible = "mediatek,mt7988-pinctrl";
+ compatible = "mediatek,mt7988-pinctrl", "syscon";
reg = <0 0x1001f000 0 0x1000>,
<0 0x11c10000 0 0x1000>,
<0 0x11d00000 0 0x1000>,
mdio {
#address-cells = <1>;
#size-cells = <0>;
+ mediatek,pio = <&pio>;
gsw_phy0: ethernet-phy@0 {
compatible = "ethernet-phy-id03a2.9481";
};
pio: pinctrl@1001f000 {
- compatible = "mediatek,mt7988-pinctrl";
+ compatible = "mediatek,mt7988-pinctrl", "syscon";
reg = <0 0x1001f000 0 0x1000>,
<0 0x11c10000 0 0x1000>,
<0 0x11d00000 0 0x1000>,