--- /dev/null
+From 4f0638b12451112de4138689fa679315c8d388dc Mon Sep 17 00:00:00 2001
+From: Ivan Galkin <ivan.galkin@axis.com>
+Date: Tue, 2 Dec 2025 10:07:42 +0100
+Subject: net: phy: RTL8211FVD: Restore disabling of PHY-mode EEE
+
+When support for RTL8211F(D)(I)-VD-CG was introduced in commit
+bb726b753f75 ("net: phy: realtek: add support for RTL8211F(D)(I)-VD-CG")
+the implementation assumed that this PHY model doesn't have the
+control register PHYCR2 (Page 0xa43 Address 0x19). This
+assumption was based on the differences in CLKOUT configurations
+between RTL8211FVD and the remaining RTL8211F PHYs. In the latter
+commit 2c67301584f2
+("net: phy: realtek: Avoid PHYCR2 access if PHYCR2 not present")
+this assumption was expanded to the PHY-mode EEE.
+
+I performed tests on RTL8211FI-VD-CG and confirmed that disabling
+PHY-mode EEE works correctly and is uniform with other PHYs
+supported by the driver. To validate the correctness,
+I contacted Realtek support. Realtek confirmed that PHY-mode EEE on
+RTL8211F(D)(I)-VD-CG is configured via Page 0xa43 Address 0x19 bit 5.
+
+Moreover, Realtek informed me that the most recent datasheet
+for RTL8211F(D)(I)-VD-CG v1.1 is incomplete and the naming of
+control registers is partly inconsistent. The errata I
+received from Realtek corrects the naming as follows:
+
+| Register | Datasheet v1.1 | Errata |
+|-------------------------|----------------|--------|
+| Page 0xa44 Address 0x11 | PHYCR2 | PHYCR3 |
+| Page 0xa43 Address 0x19 | N/A | PHYCR2 |
+
+This information confirms that the supposedly missing control register,
+PHYCR2, exists in the RTL8211F(D)(I)-VD-CG under the same address and
+the same name. It controls widely the same configs as other PHYs from
+the RTL8211F series (e.g. PHY-mode EEE). Clock out configuration is an
+exception.
+
+Given all this information, restore disabling of the PHY-mode EEE.
+
+Fixes: 2c67301584f2 ("net: phy: realtek: Avoid PHYCR2 access if PHYCR2 not present")
+Signed-off-by: Ivan Galkin <ivan.galkin@axis.com>
+Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
+Link: https://patch.msgid.link/20251202-phy_eee-v1-1-fe0bf6ab3df0@axis.com
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/phy/realtek/realtek_main.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -691,10 +691,6 @@ static int rtl8211f_config_aldps(struct
+
+ static int rtl8211f_config_phy_eee(struct phy_device *phydev)
+ {
+- /* RTL8211FVD has no PHYCR2 register */
+- if (phydev->drv->phy_id == RTL_8211FVD_PHYID)
+- return 0;
+-
+ /* Disable PHY-mode EEE so LPI is passed to the MAC */
+ return phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR2,
+ RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -2094,6 +2094,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2090,6 +2090,7 @@ static struct phy_driver realtek_drvs[]
}, {
.name = "RTL8226 2.5Gbps PHY",
.match_phy_device = rtl8226_match_phy_device,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
-@@ -2104,6 +2105,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2100,6 +2101,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_match_phy_device,
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -2126,6 +2128,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2122,6 +2124,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -2138,6 +2141,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2134,6 +2137,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
-@@ -2153,6 +2157,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2149,6 +2153,7 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.config_intr = rtl8221b_config_intr,
.handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -2164,6 +2169,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2160,6 +2165,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vm_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
-@@ -2179,6 +2185,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2175,6 +2181,7 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C45)",
.config_intr = rtl8221b_config_intr,
.handle_interrupt = rtl8221b_handle_interrupt,
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1245,8 +1245,8 @@ static int rtl822x_probe(struct phy_devi
+@@ -1241,8 +1241,8 @@ static int rtl822x_probe(struct phy_devi
static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool gen1)
{
bool has_2500, has_sgmii;
has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
phydev->host_interfaces) ||
-@@ -1288,18 +1288,42 @@ static int rtl822x_set_serdes_option_mod
+@@ -1284,18 +1284,42 @@ static int rtl822x_set_serdes_option_mod
RTL822X_VND1_SERDES_OPTION,
RTL822X_VND1_SERDES_OPTION_MODE_MASK,
mode);
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1715,9 +1715,11 @@ static bool rtlgen_supports_2_5gbps(stru
+@@ -1711,9 +1711,11 @@ static bool rtlgen_supports_2_5gbps(stru
{
int val;
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
-@@ -1305,6 +1309,15 @@ static int rtl822x_set_serdes_option_mod
+@@ -1301,6 +1305,15 @@ static int rtl822x_set_serdes_option_mod
return ret;
}
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1772,10 +1772,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1768,10 +1768,32 @@ static int rtl8226_match_phy_device(stru
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
bool is_c45)
{
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1469,6 +1469,9 @@ static int rtl822x_c45_get_features(stru
+@@ -1465,6 +1465,9 @@ static int rtl822x_c45_get_features(stru
linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
phydev->supported);
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1349,6 +1349,22 @@ static int rtl822xb_config_init(struct p
+@@ -1345,6 +1345,22 @@ static int rtl822xb_config_init(struct p
return rtl822x_set_serdes_option_mode(phydev, false);
}
static int rtl822xb_get_rate_matching(struct phy_device *phydev,
phy_interface_t iface)
{
-@@ -2223,7 +2239,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2219,7 +2235,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = rtl822x_c45_soft_reset,
.probe = rtl822x_probe,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
-@@ -2251,7 +2267,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2247,7 +2263,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = rtl822x_c45_soft_reset,
.probe = rtl822x_probe,
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1260,6 +1260,11 @@ static int rtl822x_set_serdes_option_mod
+@@ -1256,6 +1256,11 @@ static int rtl822x_set_serdes_option_mod
phydev->host_interfaces) ||
phydev->interface == PHY_INTERFACE_MODE_SGMII;
projects / openwrt / openwrt.git / commitdiff