pinctrl-names = "default";
req-mask = <0xf>;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
wifi@0,0 {
compatible = "pci0,0";
<&pci_req3_pins>, <&pci_req4_pins>;
req-mask = <0xf>;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
wifi@0,0 {
compatible = "pci0,0";
pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
pinctrl-names = "default";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
wifi@7000 {
reg = <0x7000 0 0 0 0>;
pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
pinctrl-names = "default";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
wifi@168c,0029 {
compatible = "pci168c,0029";
0x7800 0 0 2 &icu0 66
0x7800 0 0 3 &icu0 66
>;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
req-mask = <0x7>;
};
<&pci_req1_pins>, <&pci_req2_pins>;
pinctrl-names = "default";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
req-mask = <0xf>;
};
&pci0 {
status = "okay";
lantiq,external-clock;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
req-mask = <0xf>;
};
pinctrl-names = "default";
lantiq,external-clock;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
&usb_phy {
pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
pinctrl-names = "default";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
/* #define ARV4525PW_RELAY 31 */
pinctrl-names = "default";
lantiq,external-clock;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
&usb_phy {
pinctrl-names = "default";
lantiq,external-clock;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
wifi@1814,3592 {
compatible = "pci1814,3592";
0x7800 0 0 2 &icu0 135
0x7800 0 0 3 &icu0 135
>;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
req-mask = <0x3>;
wifi@1814,3592 {
pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
pinctrl-names = "default";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
lantiq,external-clock;
req-mask = <0xf>;
pinctrl-names = "default";
lantiq,external-clock;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
req-mask = <0xf>;
wifi@0,0 {
pinctrl-names = "default";
lantiq,external-clock;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
interrupt-map = <0x7000 0 0 1 &icu0 135>;
req-mask = <0x3>;
0x7800 0 0 2 &icu0 135
0x7800 0 0 3 &icu0 135
>;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
req-mask = <0x3>;
wifi@1814,3592 {
pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
pinctrl-names = "default";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
wifi@168c,0029 {
compatible = "pci168c,0029";
pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
pinctrl-names = "default";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
wifi@168c,0027 {
compatible = "pci168c,0027";
&pci0 {
status = "okay";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
&usb_phy {
&pci0 {
status = "okay";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
wifi@1814,3592 {
compatible = "pci1814,3592";
&pci0 {
status = "okay";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
wifi@1814,3091 {
compatible = "pci1814,3091";
&pci0 {
status = "okay";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
wifi@168c,002d {
compatible = "pci168c,002d";
lantiq,bus-clock = <33333333>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <0x7000 0 0 1 &icu0 30 1>;
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
&pci0 {
status = "okay";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
&spi {
pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
pinctrl-names = "default";
- gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
&stp {
--- /dev/null
+From 2677c39d4d7d3f2e0f716183fc0dc1f6ae4c4d03 Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Wed, 10 Jul 2019 20:27:48 +0200
+Subject: [PATCH 3/6] MIPS: lantiq: pci: fix inverted gpio reset logic
+
+Asserting the reset should be logic 1 and subsequently deasserting the
+reset should be logic 0.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+---
+ arch/mips/pci/pci-lantiq.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
+index 8b71b52c959f..c458cc71bc8a 100644
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -141,7 +141,7 @@ static int ltq_pci_startup(struct platform_device *pdev)
+ "failed to request gpio %d\n", reset_gpio);
+ return ret;
+ }
+- gpio_direction_output(reset_gpio, 1);
++ gpio_direction_output(reset_gpio, 0);
+ }
+
+ /* enable auto-switching between PCI and EBU */
+@@ -205,10 +205,10 @@ static int ltq_pci_startup(struct platform_device *pdev)
+
+ /* toggle reset pin */
+ if (gpio_is_valid(reset_gpio)) {
+- __gpio_set_value(reset_gpio, 0);
++ __gpio_set_value(reset_gpio, 1);
+ wmb();
+ mdelay(1);
+- __gpio_set_value(reset_gpio, 1);
++ __gpio_set_value(reset_gpio, 0);
+ }
+ return 0;
+ }
+--
+2.17.1
+
--- /dev/null
+From 23d5f2f840ff7784fa4312447371431c4fe692f2 Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Sat, 2 Feb 2019 22:56:06 +0100
+Subject: [PATCH 4/6] MIPS: lantiq: pci: use devm_gpiod_get_optional
+
+Use devm_gpiod_get_optional to aquire the reset gpio and get rid of
+quite some code this way.
+
+The devicetree property name changes from gpio-reset to reset-gpios due
+to this change. But so far no devicetree source file in the tree uses
+the gpio-reset property.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+---
+ arch/mips/pci/pci-lantiq.c | 24 +++++++++---------------
+ 1 file changed, 9 insertions(+), 15 deletions(-)
+
+diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
+index b246ff067f53..9ce9ac013060 100644
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -64,7 +64,7 @@
+ __iomem void *ltq_pci_mapped_cfg;
+ static __iomem void *ltq_pci_membase;
+
+-static int reset_gpio;
++static struct gpio_desc *reset_gpio;
+ static struct clk *clk_pci, *clk_external;
+ static struct resource pci_io_resource;
+ static struct resource pci_mem_resource;
+@@ -131,17 +131,11 @@ static int ltq_pci_startup(struct platform_device *pdev)
+ clk_disable(clk_external);
+
+ /* setup reset gpio used by pci */
+- reset_gpio = of_get_named_gpio(node, "gpio-reset", 0);
+- if (gpio_is_valid(reset_gpio)) {
+- int ret = devm_gpio_request(&pdev->dev,
+- reset_gpio, "pci-reset");
+- if (ret) {
+- dev_err(&pdev->dev,
+- "failed to request gpio %d\n", reset_gpio);
+- return ret;
+- }
+- gpio_direction_output(reset_gpio, 0);
+- }
++ reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",
++ GPIOD_OUT_LOW);
++ if (IS_ERR(reset_gpio))
++ return dev_err_probe(&pdev->dev, PTR_ERR(reset_gpio),
++ "failed to request gpio\n");
+
+ /* enable auto-switching between PCI and EBU */
+ ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);
+@@ -203,11 +197,11 @@ static int ltq_pci_startup(struct platform_device *pdev)
+ ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_IEN) | 0x10, LTQ_EBU_PCC_IEN);
+
+ /* toggle reset pin */
+- if (gpio_is_valid(reset_gpio)) {
+- __gpio_set_value(reset_gpio, 1);
++ if (reset_gpio) {
++ gpiod_set_value(reset_gpio, 1);
+ wmb();
+ mdelay(1);
+- __gpio_set_value(reset_gpio, 0);
++ gpiod_set_value(reset_gpio, 0);
+ }
+ return 0;
+ }
+--
+2.25.1
+
--- /dev/null
+From 2677c39d4d7d3f2e0f716183fc0dc1f6ae4c4d03 Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Wed, 10 Jul 2019 20:27:48 +0200
+Subject: [PATCH 3/6] MIPS: lantiq: pci: fix inverted gpio reset logic
+
+Asserting the reset should be logic 1 and subsequently deasserting the
+reset should be logic 0.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+---
+ arch/mips/pci/pci-lantiq.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
+index 8b71b52c959f..c458cc71bc8a 100644
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -141,7 +141,7 @@ static int ltq_pci_startup(struct platform_device *pdev)
+ "failed to request gpio %d\n", reset_gpio);
+ return ret;
+ }
+- gpio_direction_output(reset_gpio, 1);
++ gpio_direction_output(reset_gpio, 0);
+ }
+
+ /* enable auto-switching between PCI and EBU */
+@@ -205,10 +205,10 @@ static int ltq_pci_startup(struct platform_device *pdev)
+
+ /* toggle reset pin */
+ if (gpio_is_valid(reset_gpio)) {
+- __gpio_set_value(reset_gpio, 0);
++ __gpio_set_value(reset_gpio, 1);
+ wmb();
+ mdelay(1);
+- __gpio_set_value(reset_gpio, 1);
++ __gpio_set_value(reset_gpio, 0);
+ }
+ return 0;
+ }
+--
+2.17.1
+
--- /dev/null
+From 495589e54437bd1cd34521aae61b17e08bb41e6b Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Sat, 2 Feb 2019 22:56:06 +0100
+Subject: [PATCH 4/6] MIPS: lantiq: pci: use devm_gpiod_get_optional
+
+Use devm_gpiod_get_optional to aquire the reset gpio and get rid of
+quite some code this way.
+
+The devicetree property name changes from gpio-reset to reset-gpios due
+to this change. But so far no devicetree source file in the tree uses
+the gpio-reset property.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+---
+ arch/mips/pci/pci-lantiq.c | 25 +++++++++++--------------
+ 1 file changed, 11 insertions(+), 14 deletions(-)
+
+diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
+index c458cc71bc8a..f4332495b684 100644
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -63,7 +63,7 @@
+ __iomem void *ltq_pci_mapped_cfg;
+ static __iomem void *ltq_pci_membase;
+
+-static int reset_gpio;
++static struct gpio_desc *reset_gpio;
+ static struct clk *clk_pci, *clk_external;
+ static struct resource pci_io_resource;
+ static struct resource pci_mem_resource;
+@@ -132,16 +132,13 @@ static int ltq_pci_startup(struct platform_device *pdev)
+ clk_disable(clk_external);
+
+ /* setup reset gpio used by pci */
+- reset_gpio = of_get_named_gpio(node, "gpio-reset", 0);
+- if (gpio_is_valid(reset_gpio)) {
+- int ret = devm_gpio_request(&pdev->dev,
+- reset_gpio, "pci-reset");
+- if (ret) {
+- dev_err(&pdev->dev,
+- "failed to request gpio %d\n", reset_gpio);
+- return ret;
+- }
+- gpio_direction_output(reset_gpio, 0);
++ reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset",
++ GPIOD_OUT_LOW);
++ if (IS_ERR(reset_gpio)) {
++ if (PTR_ERR(reset_gpio) != -EPROBE_DEFER)
++ dev_err(&pdev->dev, "failed to request gpio\n");
++
++ return PTR_ERR(reset_gpio);
+ }
+
+ /* enable auto-switching between PCI and EBU */
+@@ -204,11 +201,11 @@ static int ltq_pci_startup(struct platform_device *pdev)
+ ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_IEN) | 0x10, LTQ_EBU_PCC_IEN);
+
+ /* toggle reset pin */
+- if (gpio_is_valid(reset_gpio)) {
+- __gpio_set_value(reset_gpio, 1);
++ if (reset_gpio) {
++ gpiod_set_value(reset_gpio, 1);
+ wmb();
+ mdelay(1);
+- __gpio_set_value(reset_gpio, 0);
++ gpiod_set_value(reset_gpio, 0);
+ }
+ return 0;
+ }
+--
+2.25.1
+
projects / openwrt / staging / mkresin.git / commitdiff