--- /dev/null
+From e7b012cb4db7253d186fd485ab07c7346c645dab Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Fri, 8 Nov 2024 12:22:34 +0100
+Subject: [PATCH] clk: lan966x: make it selectable for ARCH_LAN969X
+
+LAN969x uses the same LAN966x clock driver so make it selectable for
+ARCH_LAN969X.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+Link: https://lore.kernel.org/r/20241108112355.20251-1-robert.marko@sartura.hr
+Signed-off-by: Stephen Boyd <sboyd@kernel.org>
+---
+ drivers/clk/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/clk/Kconfig
++++ b/drivers/clk/Kconfig
+@@ -259,7 +259,7 @@ config COMMON_CLK_LAN966X
+ tristate "Generic Clock Controller driver for LAN966X SoC"
+ depends on HAS_IOMEM
+ depends on OF
+- depends on SOC_LAN966 || COMPILE_TEST
++ depends on SOC_LAN966 || ARCH_LAN969X || COMPILE_TEST
+ help
+ This driver provides support for Generic Clock Controller(GCK) on
+ LAN966X SoC. GCK generates and supplies clock to various peripherals
--- /dev/null
+From d543d3eb06873f0ab8edb0d1f8364e9af93544a0 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Fri, 31 Oct 2025 13:18:12 +0100
+Subject: [PATCH] phy: sparx5-serdes: make it selectable for ARCH_LAN969X
+
+LAN969x uses the SparX-5 SERDES driver, so make it selectable for
+ARCH_LAN969X.
+
+Reviewed-by: Daniel Machon <daniel.machon@microchip.com>
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+Tested-by: Gabor Juhos <j4g8y7@gmail.com>
+Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
+Link: https://patch.msgid.link/20251031121834.665987-1-robert.marko@sartura.hr
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+---
+ drivers/phy/microchip/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/phy/microchip/Kconfig
++++ b/drivers/phy/microchip/Kconfig
+@@ -6,7 +6,7 @@
+ config PHY_SPARX5_SERDES
+ tristate "Microchip Sparx5 SerDes PHY driver"
+ select GENERIC_PHY
+- depends on ARCH_SPARX5 || COMPILE_TEST
++ depends on ARCH_SPARX5 || ARCH_LAN969X || COMPILE_TEST
+ depends on OF
+ depends on HAS_IOMEM
+ help
--- /dev/null
+From bf919ccfced7d47d14ec2d20ae465e8ae410aee6 Mon Sep 17 00:00:00 2001
+From: Robert Marko <robert.marko@sartura.hr>
+Date: Mon, 22 Sep 2025 16:27:29 +0200
+Subject: [PATCH] reset: sparx5: add LAN969x support
+
+LAN969x uses the same reset configuration as LAN966x, but we need to
+allow compiling it when ARCH_LAN969X is selected.
+
+A fallback compatible to LAN966x will be used.
+
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
+---
+ drivers/reset/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/reset/Kconfig
++++ b/drivers/reset/Kconfig
+@@ -147,7 +147,7 @@ config RESET_LPC18XX
+
+ config RESET_MCHP_SPARX5
+ bool "Microchip Sparx5 reset driver"
+- depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST
++ depends on ARCH_SPARX5 || ARCH_LAN969X || SOC_LAN966 || COMPILE_TEST
+ default y if SPARX5_SWITCH
+ select MFD_SYSCON
+ help
--- /dev/null
+From d3824968dbd9056844bbd5041020a3e28c748558 Mon Sep 17 00:00:00 2001
+From: Tony Han <tony.han@microchip.com>
+Date: Wed, 3 Dec 2025 13:11:43 +0100
+Subject: [PATCH] dmaengine: at_xdmac: get the number of DMA channels from
+ device tree
+
+In case of kernel runs in non-secure mode, the number of DMA channels can
+be got from device tree since the value read from GTYPE register is "0" as
+it's always secured.
+
+As the number of channels can never be negative, update them to the type
+"unsigned".
+
+This is required for LAN969x.
+
+Signed-off-by: Tony Han <tony.han@microchip.com>
+Signed-off-by: Robert Marko <robert.marko@sartura.hr>
+Link: https://patch.msgid.link/20251203121208.1269487-1-robert.marko@sartura.hr
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+---
+ drivers/dma/at_xdmac.c | 26 +++++++++++++++++++++++---
+ 1 file changed, 23 insertions(+), 3 deletions(-)
+
+--- a/drivers/dma/at_xdmac.c
++++ b/drivers/dma/at_xdmac.c
+@@ -2259,12 +2259,29 @@ static int __maybe_unused atmel_xdmac_ru
+ return clk_enable(atxdmac->clk);
+ }
+
++static inline int at_xdmac_get_channel_number(struct platform_device *pdev,
++ u32 reg, u32 *pchannels)
++{
++ int ret;
++
++ if (reg) {
++ *pchannels = AT_XDMAC_NB_CH(reg);
++ return 0;
++ }
++
++ ret = of_property_read_u32(pdev->dev.of_node, "dma-channels", pchannels);
++ if (ret)
++ dev_err(&pdev->dev, "can't get number of channels\n");
++
++ return ret;
++}
++
+ static int at_xdmac_probe(struct platform_device *pdev)
+ {
+ struct at_xdmac *atxdmac;
+- int irq, nr_channels, i, ret;
++ int irq, ret;
+ void __iomem *base;
+- u32 reg;
++ u32 nr_channels, i, reg;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+@@ -2280,7 +2297,10 @@ static int at_xdmac_probe(struct platfor
+ * of channels to do the allocation.
+ */
+ reg = readl_relaxed(base + AT_XDMAC_GTYPE);
+- nr_channels = AT_XDMAC_NB_CH(reg);
++ ret = at_xdmac_get_channel_number(pdev, reg, &nr_channels);
++ if (ret)
++ return ret;
++
+ if (nr_channels > AT_XDMAC_MAX_CHAN) {
+ dev_err(&pdev->dev, "invalid number of channels (%u)\n",
+ nr_channels);
+++ /dev/null
-From 78d996ea8dbc6fa21ecb28d1b6167d6f2e0043cb Mon Sep 17 00:00:00 2001
-From: Robert Marko <robert.marko@sartura.hr>
-Date: Fri, 8 Nov 2024 12:22:34 +0100
-Subject: [PATCH 07/25] clk: lan966x: make it selectable for ARCH_LAN969X
-
-LAN969x uses the same LAN966x clock driver so make it selectable for
-ARCH_LAN969X.
-
-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
-Link: https://lore.kernel.org/r/20241108112355.20251-1-robert.marko@sartura.hr
-Signed-off-by: Stephen Boyd <sboyd@kernel.org>
----
- drivers/clk/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/clk/Kconfig
-+++ b/drivers/clk/Kconfig
-@@ -259,7 +259,7 @@ config COMMON_CLK_LAN966X
- tristate "Generic Clock Controller driver for LAN966X SoC"
- depends on HAS_IOMEM
- depends on OF
-- depends on SOC_LAN966 || COMPILE_TEST
-+ depends on SOC_LAN966 || ARCH_LAN969X || COMPILE_TEST
- help
- This driver provides support for Generic Clock Controller(GCK) on
- LAN966X SoC. GCK generates and supplies clock to various peripherals
+++ /dev/null
-From f11759a7a2c10d32324adf3cc5d4fe95ef74df77 Mon Sep 17 00:00:00 2001
-From: Robert Marko <robert.marko@sartura.hr>
-Date: Wed, 17 Sep 2025 12:55:14 +0200
-Subject: [PATCH 16/25] phy: sparx5-serdes: make it selectable for ARCH_LAN969X
-
-LAN969x uses the SparX-5 SERDES driver, so make it selectable for
-ARCH_LAN969X.
-
-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
-Reviewed-by: Daniel Machon <daniel.machon@microchip.com>
----
- drivers/phy/microchip/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/phy/microchip/Kconfig
-+++ b/drivers/phy/microchip/Kconfig
-@@ -6,7 +6,7 @@
- config PHY_SPARX5_SERDES
- tristate "Microchip Sparx5 SerDes PHY driver"
- select GENERIC_PHY
-- depends on ARCH_SPARX5 || COMPILE_TEST
-+ depends on ARCH_SPARX5 || ARCH_LAN969X || COMPILE_TEST
- depends on OF
- depends on HAS_IOMEM
- help
+++ /dev/null
-From f7a517f6f1c0ac240e2a2b2bae9c7efb4a92430a Mon Sep 17 00:00:00 2001
-From: Robert Marko <robert.marko@sartura.hr>
-Date: Tue, 5 Nov 2024 13:36:21 +0100
-Subject: [PATCH] reset: sparx5: add LAN969x support
-
-LAN969x uses the same reset configuration as LAN966x, but we need to
-allow compiling it when ARCH_LAN969X is selected.
-
-A fallback compatible to LAN966x will be used.
-
-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
----
- drivers/reset/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/reset/Kconfig
-+++ b/drivers/reset/Kconfig
-@@ -147,7 +147,7 @@ config RESET_LPC18XX
-
- config RESET_MCHP_SPARX5
- bool "Microchip Sparx5 reset driver"
-- depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST
-+ depends on ARCH_SPARX5 || ARCH_LAN969X || SOC_LAN966 || COMPILE_TEST
- default y if SPARX5_SWITCH
- select MFD_SYSCON
- help
+++ /dev/null
-From cb65fd2bb68fdbf719d1ce08b11b92d431be8a84 Mon Sep 17 00:00:00 2001
-From: Tony Han <tony.han@microchip.com>
-Date: Tue, 12 Dec 2023 13:32:42 +0800
-Subject: [PATCH] dmaengine: at_xdmac: get the number of DMA channels from
- device tree
-
-In case of kernel runs in non-secure mode, the number of DMA channels can
-be got from device tree since the value read from GTYPE register is "0" as
-it's always secured.
-As the number of channels can never be negative, update them to the type
-"unsigned".
-
-Signed-off-by: Tony Han <tony.han@microchip.com>
-Reviewed-by: Cristian Birsan <cristian.birsan@microchip.com>
----
- drivers/dma/at_xdmac.c | 26 +++++++++++++++++++++++---
- 1 file changed, 23 insertions(+), 3 deletions(-)
-
---- a/drivers/dma/at_xdmac.c
-+++ b/drivers/dma/at_xdmac.c
-@@ -2259,12 +2259,29 @@ static int __maybe_unused atmel_xdmac_ru
- return clk_enable(atxdmac->clk);
- }
-
-+static inline int at_xdmac_get_channel_number(struct platform_device *pdev,
-+ u32 reg, u32 *pchannels)
-+{
-+ int ret;
-+
-+ if (reg) {
-+ *pchannels = AT_XDMAC_NB_CH(reg);
-+ return 0;
-+ }
-+
-+ ret = of_property_read_u32(pdev->dev.of_node, "dma-channels", pchannels);
-+ if (ret)
-+ dev_err(&pdev->dev, "can't get number of channels\n");
-+
-+ return ret;
-+}
-+
- static int at_xdmac_probe(struct platform_device *pdev)
- {
- struct at_xdmac *atxdmac;
-- int irq, nr_channels, i, ret;
-+ int irq, ret;
- void __iomem *base;
-- u32 reg;
-+ u32 nr_channels, i, reg;
-
- irq = platform_get_irq(pdev, 0);
- if (irq < 0)
-@@ -2280,7 +2297,10 @@ static int at_xdmac_probe(struct platfor
- * of channels to do the allocation.
- */
- reg = readl_relaxed(base + AT_XDMAC_GTYPE);
-- nr_channels = AT_XDMAC_NB_CH(reg);
-+ ret = at_xdmac_get_channel_number(pdev, reg, &nr_channels);
-+ if (ret)
-+ return ret;
-+
- if (nr_channels > AT_XDMAC_MAX_CHAN) {
- dev_err(&pdev->dev, "invalid number of channels (%u)\n",
- nr_channels);
projects / openwrt / openwrt.git / commitdiff