Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++--
+ arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++--
1 file changed, 32 insertions(+), 2 deletions(-)
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -301,6 +301,12 @@
};
cxo_board: cxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
-@@ -575,15 +581,30 @@
- clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
- clock-names = "pll8_vote", "pxo";
- clock-output-names = "acpu_l2_aux";
-+ #clock-cells = <0>;
-+ };
-+
-+ kraitcc: clock-controller {
-+ compatible = "qcom,krait-cc-v1";
-+ clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>,
-+ <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>;
-+ clock-names = "hfpll0", "hfpll1", "hfpll_l2",
-+ "acpu0_aux", "acpu1_aux", "acpu_l2_aux",
-+ "qsb", "pxo";
-+ #clock-cells = <1>;
- };
-
- acc0: clock-controller@2088000 {
- compatible = "qcom,kpss-acc-v1";
- reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
-+ clock-output-names = "acpu0_aux";
-+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
-+ clock-names = "pll8_vote", "pxo";
-+ #clock-cells = <0>;
+@@ -575,7 +581,7 @@
};
saw0: regulator@2089000 {
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
regulator;
};
-@@ -591,14 +612,24 @@
- acc1: clock-controller@2098000 {
- compatible = "qcom,kpss-acc-v1";
- reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
-+ clock-output-names = "acpu1_aux";
-+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
-+ clock-names = "pll8_vote", "pxo";
-+ #clock-cells = <0>;
+@@ -591,11 +612,27 @@
};
saw1: regulator@2099000 {
+ regulator;
+ };
+
- nss_common: syscon@03000000 {
++ kraitcc: clock-controller {
++ compatible = "qcom,krait-cc-v1";
++ clocks = <&gcc PLL9>, <&gcc PLL10>, <&gcc PLL12>,
++ <&acc0>, <&acc1>, <&l2cc>, <&qsb>, <&pxo_board>;
++ clock-names = "hfpll0", "hfpll1", "hfpll_l2",
++ "acpu0_aux", "acpu1_aux", "acpu_l2_aux",
++ "qsb", "pxo";
++ #clock-cells = <1>;
++ };
++
+ nss_common: syscon@3000000 {
compatible = "syscon";
reg = <0x03000000 0x0000FFFF>;
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++
+ arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++
1 file changed, 99 insertions(+)
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -48,6 +48,105 @@
};
};
thermal-zones {
sensor0-thermal {
polling-delay-passive = <0>;
---- a/arch/arm/boot/dts/qcom-ipq8065.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8065.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8065.dtsi
@@ -6,3 +6,92 @@
model = "Qualcomm Technologies, Inc. IPQ8065";
compatible = "qcom,ipq8065", "qcom,ipq8064";
+ opp-level = <2>;
+ };
+};
---- a/arch/arm/boot/dts/qcom-ipq8062.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8062.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8062.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8062.dtsi
@@ -6,3 +6,39 @@
model = "Qualcomm Technologies, Inc. IPQ8062";
compatible = "qcom,ipq8062", "qcom,ipq8064";
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
---
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
+ arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -30,6 +30,15 @@
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
};
cpu1: cpu@1 {
-@@ -40,11 +49,35 @@
+@@ -40,12 +49,36 @@
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
L2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
+ qcom,saw = <&saw_l2>;
+
+ clocks = <&kraitcc 4>;
};
};
---- a/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-smb208.dtsi
@@ -2,6 +2,18 @@
#include "qcom-ipq8064.dtsi"
&rpm {
smb208_regulators: regulators {
compatible = "qcom,rpm-smb208-regulators";
---- a/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0-smb208.dtsi
@@ -2,6 +2,18 @@
#include "qcom-ipq8064-v2.0.dtsi"
&rpm {
smb208_regulators: regulators {
compatible = "qcom,rpm-smb208-regulators";
---- a/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8062-smb208.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8062-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8062-smb208.dtsi
@@ -2,6 +2,18 @@
#include "qcom-ipq8062.dtsi"
&rpm {
smb208_regulators: regulators {
compatible = "qcom,rpm-smb208-regulators";
---- a/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8065-smb208.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8065-smb208.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8065-smb208.dtsi
@@ -2,6 +2,18 @@
#include "qcom-ipq8065.dtsi"
Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
---
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 7 ++-----
+ arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -599,12 +599,9 @@
};
Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
---
- arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 134 +++++++++++-----------
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 14 +++
+ arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts | 134 +++++++++++-----------
+ arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 14 +++
2 files changed, 81 insertions(+), 67 deletions(-)
---- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
-+++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
-@@ -25,73 +25,6 @@
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts
+@@ -25,131 +25,6 @@
device_type = "memory";
};
-
- switch0: switch@10 {
- compatible = "qca,qca8337";
-- #address-cells = <1>;
-- #size-cells = <0>;
-
- dsa,member = <0 0>;
-
- port@1 {
- reg = <1>;
- label = "sw1";
+-
+- leds {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+- led@0 {
+- reg = <0>;
+- color = <LED_COLOR_ID_GREEN>;
+- function = LED_FUNCTION_LAN;
+- default-state = "keep";
+- };
+- };
- };
-
- port@2 {
- reg = <2>;
- label = "sw2";
+-
+- leds {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+- led@0 {
+- reg = <0>;
+- color = <LED_COLOR_ID_GREEN>;
+- function = LED_FUNCTION_LAN;
+- default-state = "keep";
+- };
+- };
- };
-
- port@3 {
- reg = <3>;
- label = "sw3";
+-
+- leds {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+- led@0 {
+- reg = <0>;
+- color = <LED_COLOR_ID_GREEN>;
+- function = LED_FUNCTION_LAN;
+- default-state = "keep";
+- };
+- };
- };
-
- port@4 {
- reg = <4>;
- label = "sw4";
+-
+- leds {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+- led@0 {
+- reg = <0>;
+- color = <LED_COLOR_ID_GREEN>;
+- function = LED_FUNCTION_LAN;
+- default-state = "keep";
+- };
+- };
- };
-
- port@5 {
- reg = <5>;
- label = "sw5";
+-
+- leds {
+- #address-cells = <1>;
+- #size-cells = <0>;
+-
+- led@0 {
+- reg = <0>;
+- color = <LED_COLOR_ID_GREEN>;
+- function = LED_FUNCTION_LAN;
+- default-state = "keep";
+- };
+- };
- };
- };
- };
mdio1: mdio-1 {
status = "okay";
compatible = "virtual,mdio-gpio";
-@@ -222,6 +155,73 @@
+@@ -222,6 +155,131 @@
status = "okay";
};
+
+ switch0: switch@10 {
+ compatible = "qca,qca8337";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
+
+ dsa,member = <0 0>;
+
+ port@1 {
+ reg = <1>;
+ label = "sw1";
++
++ leds {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ led@0 {
++ reg = <0>;
++ color = <LED_COLOR_ID_GREEN>;
++ function = LED_FUNCTION_LAN;
++ default-state = "keep";
++ };
++ };
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "sw2";
++
++ leds {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ led@0 {
++ reg = <0>;
++ color = <LED_COLOR_ID_GREEN>;
++ function = LED_FUNCTION_LAN;
++ default-state = "keep";
++ };
++ };
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "sw3";
++
++ leds {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ led@0 {
++ reg = <0>;
++ color = <LED_COLOR_ID_GREEN>;
++ function = LED_FUNCTION_LAN;
++ default-state = "keep";
++ };
++ };
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "sw4";
++
++ leds {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ led@0 {
++ reg = <0>;
++ color = <LED_COLOR_ID_GREEN>;
++ function = LED_FUNCTION_LAN;
++ default-state = "keep";
++ };
++ };
+ };
+
+ port@5 {
+ reg = <5>;
+ label = "sw5";
++
++ leds {
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ led@0 {
++ reg = <0>;
++ color = <LED_COLOR_ID_GREEN>;
++ function = LED_FUNCTION_LAN;
++ default-state = "keep";
++ };
++ };
+ };
+ };
+ };
&gmac0 {
status = "okay";
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -476,6 +476,20 @@
- snps,blen = <16 0 0 0 0 0 0>;
+ status = "disabled";
};
+ mdio0: mdio@37000000 {
+ status = "disabled";
+ };
+
- vsdcc_fixed: vsdcc-regulator {
- compatible = "regulator-fixed";
- regulator-name = "SDCC Power";
+ gmac0: ethernet@37000000 {
+ device_type = "network";
+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 22 +++++++++++-----------
+ arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -69,16 +69,6 @@
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
+@@ -69,17 +69,6 @@
min-residency-us = <3000>;
};
};
- L2: l2-cache {
- compatible = "cache";
- cache-level = <2>;
+- cache-unified;
- qcom,saw = <&saw_l2>;
-
- clocks = <&kraitcc 4>;
};
opp_table_l2: opp_table_l2 {
-@@ -1409,6 +1399,16 @@
+@@ -1409,6 +1399,17 @@
#reset-cells = <1>;
};
+ L2: l2-cache {
+ compatible = "cache", "qcom,krait-cache";
+ cache-level = <2>;
++ cache-unified;
+ qcom,saw = <&saw_l2>;
+
+ clocks = <&kraitcc 4>;
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
- arch/arm/boot/dts/qcom-ipq8064.dtsi | 19 +++++++++++++++++++
+ arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+--- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
@@ -170,6 +170,18 @@
};
};
--- a/drivers/clk/qcom/clk-krait.c
+++ b/drivers/clk/qcom/clk-krait.c
-@@ -97,53 +97,58 @@ const struct clk_ops krait_mux_clk_ops =
+@@ -97,53 +97,57 @@ const struct clk_ops krait_mux_clk_ops =
EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
/* The divider can divide by 2, 4, 6 and 8. But we only really need div-2. */
--static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate,
-+static long krait_div_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *parent_rate)
+-static int krait_div2_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
++static int krait_div_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
{
-- *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2);
-- return DIV_ROUND_UP(*parent_rate, 2);
+- req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), req->rate * 2);
+- req->rate = DIV_ROUND_UP(req->best_parent_rate, 2);
+ struct krait_div_clk *d = to_krait_div_clk(hw);
+
-+ *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
-+ rate * d->divisor);
-+
-+ return DIV_ROUND_UP(*parent_rate, d->divisor);
++ req->best_parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
++ req->rate * d->divisor);
++ req->rate = DIV_ROUND_UP(req->best_parent_rate, d->divisor);
+ return 0;
}
-static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate,
}
-const struct clk_ops krait_div2_clk_ops = {
-- .round_rate = krait_div2_round_rate,
+- .determine_rate = krait_div2_determine_rate,
- .set_rate = krait_div2_set_rate,
- .recalc_rate = krait_div2_recalc_rate,
+const struct clk_ops krait_div_clk_ops = {
-+ .round_rate = krait_div_round_rate,
++ .determine_rate = krait_div_determine_rate,
+ .set_rate = krait_div_set_rate,
+ .recalc_rate = krait_div_recalc_rate,
};