realtek: refactor keep vlan tag setup, fix tagged forwarding
authorLuiz Angelo Daros de Luca <luizluca@gmail.com>
Mon, 7 Nov 2022 23:10:08 +0000 (20:10 -0300)
committerSander Vanheule <sander@svanheule.net>
Thu, 1 Dec 2022 21:15:55 +0000 (22:15 +0100)
The code in dsa.c:rtl83xx_port_enable() was trying to set
vlan_port_tag_sts_ctrl while dealing with differences between SoCs.
However, not only that register has a different address, the register
structure and even the 2-bit value semantic changes for each SoC.

The vlan_port_tag_sts_ctrl field was dropped and converted into a
vlan_port_keep_incoming_tag_set() function that abstracts the different
between SoCs. The macro referencing that register migrated to the SoC
specific c file as it will be privately used by each file.

All magic numbers were converted into macros using BITMASK and
FIELD_PREP.

The vlan_port_tag_sts_ctrl debugfs was dropped for now as it is already
broken for rtl93xx. The best place for SoC specific code might be in each
respective c file and not in if/else clauses.

The final result is:

rtl838x: set ITAG_STS=TAGGED, same as before
rtl839x: set ITAG_STS=TAGGED instead of IGR_P_ITAG_KEEP=0x1, fixing
 forwarding of tagged packets
rtl930x: set EGR_ITAG_STS=TAGGED instead of IGR_P_ITAG=0x1, possibly
 fixing forwarding of tagged packets
rtl931x: set EGR_ITAG_STS=TAGGED instead of OTPID_KEEP=0x1, possibly
         fixing forwarding of tagged packets

Without (EGR_)ITAG_STS=TAGGED, at least for rtl839x, forwarded packets
will drop the vlan tag while packets from the CPU will still have the
correct tag.

Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/debugfs.c
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl838x.c
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl838x.h
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl930x.c
target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl931x.c

index 6dd064c95bda52b4bf3176e4fbb60394ca4b83b1..9a7c7714c64e7e4390221e34684c4ee33da2f2b3 100644 (file)
@@ -482,10 +482,6 @@ static int rtl838x_dbgfs_port_init(struct dentry *parent, struct rtl838x_switch_
 
                debugfs_create_x32("storm_rate_bc", 0644, port_dir,
                                (u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_BC(port)));
-
-               debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
-                               (u32 *)(RTL838X_SW_BASE + RTL838X_VLAN_PORT_TAG_STS_CTRL 
-                               + (port << 2)));
        } else {
                debugfs_create_x32("storm_rate_uc", 0644, port_dir,
                                (u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_UC_0(port)));
@@ -495,10 +491,6 @@ static int rtl838x_dbgfs_port_init(struct dentry *parent, struct rtl838x_switch_
 
                debugfs_create_x32("storm_rate_bc", 0644, port_dir,
                                (u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_BC_0(port)));
-
-               debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
-                               (u32 *)(RTL838X_SW_BASE + RTL839X_VLAN_PORT_TAG_STS_CTRL
-                               + (port << 2)));
        }
 
        debugfs_create_u32("id", 0444, port_dir, (u32 *)&priv->ports[port].dp->index);
index 239b02b6ee2fe0974a4742fc7b8982494d0c12c0..6eea0dc93676a013bbf83627f0b4e69b9b4315a4 100644 (file)
@@ -1063,10 +1063,7 @@ static int rtl83xx_port_enable(struct dsa_switch *ds, int port,
        priv->ports[port].enable = true;
 
        /* enable inner tagging on egress, do not keep any tags */
-       if (priv->family_id == RTL9310_FAMILY_ID)
-               sw_w32(BIT(4), priv->r->vlan_port_tag_sts_ctrl + (port << 2));
-       else
-               sw_w32(1, priv->r->vlan_port_tag_sts_ctrl + (port << 2));
+       priv->r->vlan_port_keep_tag_set(port, 0, 1);
 
        if (dsa_is_cpu_port(ds, port))
                return 0;
index 93fab7e6e30f74bc2823a8e41ef0fd1bea0b488d..9ce50989790e12ab45c7dc38c962f39b973ef107 100644 (file)
@@ -6,6 +6,22 @@
 
 #include "rtl83xx.h"
 
+#define RTL838X_VLAN_PORT_TAG_STS_UNTAG                                0x0
+#define RTL838X_VLAN_PORT_TAG_STS_TAGGED                       0x1
+#define RTL838X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED              0x2
+
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_BASE                    0xA530
+/* port 0-28 */
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL(port) \
+               RTL838X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
+
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK    GENMASK(11,10)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK    GENMASK(9,8)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK    GENMASK(7,6)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK    GENMASK(5,4)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK           GENMASK(3,2)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK           GENMASK(1,0)
+
 extern struct mutex smi_lock;
 
 // see_dal_maple_acl_log2PhyTmplteField and src/app/diag_v2/src/diag_acl.c
@@ -1612,6 +1628,15 @@ static int rtl838x_l3_setup(struct rtl838x_switch_priv *priv)
        return 0;
 }
 
+void rtl838x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+{
+       sw_w32(FIELD_PREP(RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
+                         keep_outer ? RTL838X_VLAN_PORT_TAG_STS_TAGGED : RTL838X_VLAN_PORT_TAG_STS_UNTAG) |
+              FIELD_PREP(RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK,
+                         keep_inner ? RTL838X_VLAN_PORT_TAG_STS_TAGGED : RTL838X_VLAN_PORT_TAG_STS_UNTAG),
+              RTL838X_VLAN_PORT_TAG_STS_CTRL(port));
+}
+
 void rtl838x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
 {
        if (type == PBVLAN_TYPE_INNER)
@@ -1742,7 +1767,7 @@ const struct rtl838x_reg rtl838x_reg = {
        .write_l2_entry_using_hash = rtl838x_write_l2_entry_using_hash,
        .read_cam = rtl838x_read_cam,
        .write_cam = rtl838x_write_cam,
-       .vlan_port_tag_sts_ctrl = RTL838X_VLAN_PORT_TAG_STS_CTRL,
+       .vlan_port_keep_tag_set = rtl838x_vlan_port_keep_tag_set,
        .vlan_port_pvidmode_set = rtl838x_vlan_port_pvidmode_set,
        .vlan_port_pvid_set = rtl838x_vlan_port_pvid_set,
        .trk_mbr_ctr = rtl838x_trk_mbr_ctr,
index 10913dacef42eb02278ce447df925428849e427b..19049e4c957a069212b4521d39592004571eb011 100644 (file)
 #define RTL838X_VLAN_PORT_EGR_FLTR             (0x3A84)
 #define RTL838X_VLAN_PORT_PB_VLAN              (0x3C00)
 #define RTL838X_VLAN_PORT_IGR_FLTR             (0x3A7C)
-#define RTL838X_VLAN_PORT_TAG_STS_CTRL         (0xA530)
 
 #define RTL839X_VLAN_PROFILE(idx)              (0x25C0 + (((idx) << 3)))
 #define RTL839X_VLAN_CTRL                      (0x26D4)
 #define RTL839X_VLAN_PORT_PB_VLAN              (0x26D8)
 #define RTL839X_VLAN_PORT_IGR_FLTR             (0x27B4)
 #define RTL839X_VLAN_PORT_EGR_FLTR             (0x27C4)
-#define RTL839X_VLAN_PORT_TAG_STS_CTRL         (0x6828)
-#define RTL839X_VLAN_PORT_TAG_STS_CTRL         (0x6828)
 
 #define RTL930X_VLAN_PROFILE_SET(idx)          (0x9c60 + (((idx) * 20)))
 #define RTL930X_VLAN_CTRL                      (0x82D4)
 #define RTL930X_VLAN_PORT_PB_VLAN              (0x82D8)
 #define RTL930X_VLAN_PORT_IGR_FLTR             (0x83C0)
 #define RTL930X_VLAN_PORT_EGR_FLTR             (0x83C8)
-#define RTL930X_VLAN_PORT_TAG_STS_CTRL         (0xCE24)
 
 #define RTL931X_VLAN_PROFILE_SET(idx)          (0x9800 + (((idx) * 28)))
 #define RTL931X_VLAN_CTRL                      (0x94E4)
 #define RTL931X_VLAN_PORT_IGR_CTRL             (0x94E8)
 #define RTL931X_VLAN_PORT_IGR_FLTR             (0x96B4)
 #define RTL931X_VLAN_PORT_EGR_FLTR             (0x96C4)
-#define RTL931X_VLAN_PORT_TAG_CTRL             (0x4860)
 
 /* Table access registers */
 #define RTL838X_TBL_ACCESS_CTRL_0              (0x6914)
@@ -980,6 +975,7 @@ struct rtl838x_reg {
        void (*vlan_profile_setup)(int profile);
        void (*vlan_port_pvidmode_set)(int port, enum pbvlan_type type, enum pbvlan_mode mode);
        void (*vlan_port_pvid_set)(int port, enum pbvlan_type type, int pvid);
+       void (*vlan_port_keep_tag_set)(int port, bool keep_outer, bool keep_inner);
        void (*set_vlan_igr_filter)(int port, enum igr_filter state);
        void (*set_vlan_egr_filter)(int port, enum egr_filter state);
        void (*enable_learning)(int port, bool enable);
@@ -1005,8 +1001,6 @@ struct rtl838x_reg {
        void (*write_l2_entry_using_hash)(u32 hash, u32 pos, struct rtl838x_l2_entry *e);
        u64 (*read_cam)(int idx, struct rtl838x_l2_entry *e);
        void (*write_cam)(int idx, struct rtl838x_l2_entry *e);
-       int vlan_port_tag_sts_ctrl;
-       int (*rtl838x_vlan_port_tag_sts_ctrl)(int port);
        int (*trk_mbr_ctr)(int group);
        int rma_bpdu_fld_pmask;
        int spcl_trap_eapol_ctrl;
index 29912257e829648402d14d36ba7770af427823ee..986a4b5f45c7c1bd394691420a084cb9498c4a9d 100644 (file)
@@ -3,6 +3,21 @@
 #include <asm/mach-rtl838x/mach-rtl83xx.h>
 #include "rtl83xx.h"
 
+#define RTL839X_VLAN_PORT_TAG_STS_UNTAG                                0x0
+#define RTL839X_VLAN_PORT_TAG_STS_TAGGED                       0x1
+#define RTL839X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED              0x2
+
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_BASE                    0x6828
+/* port 0-52 */
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL(port) \
+               RTL839X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK           GENMASK(7,6)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK           GENMASK(5,4)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK    GENMASK(3,3)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK    GENMASK(2,2)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK    GENMASK(1,1)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK    GENMASK(0,0)
+
 extern struct mutex smi_lock;
 extern struct rtl83xx_soc_info soc_info;
 
@@ -1755,6 +1770,15 @@ int rtl839x_l3_setup(struct rtl838x_switch_priv *priv)
        return 0;
 }
 
+void rtl839x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+{
+       sw_w32(FIELD_PREP(RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
+                         keep_outer ? RTL839X_VLAN_PORT_TAG_STS_TAGGED : RTL839X_VLAN_PORT_TAG_STS_UNTAG) |
+              FIELD_PREP(RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK,
+                         keep_inner ? RTL839X_VLAN_PORT_TAG_STS_TAGGED : RTL839X_VLAN_PORT_TAG_STS_UNTAG),
+              RTL839X_VLAN_PORT_TAG_STS_CTRL(port));
+}
+
 void rtl839x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
 {
        if (type == PBVLAN_TYPE_INNER)
@@ -1860,6 +1884,7 @@ const struct rtl838x_reg rtl839x_reg = {
        .vlan_profile_dump = rtl839x_vlan_profile_dump,
        .vlan_profile_setup = rtl839x_vlan_profile_setup,
        .vlan_fwd_on_inner = rtl839x_vlan_fwd_on_inner,
+       .vlan_port_keep_tag_set = rtl839x_vlan_port_keep_tag_set,
        .vlan_port_pvidmode_set = rtl839x_vlan_port_pvidmode_set,
        .vlan_port_pvid_set = rtl839x_vlan_port_pvid_set,
        .set_vlan_igr_filter = rtl839x_set_igr_filter,
@@ -1886,7 +1911,6 @@ const struct rtl838x_reg rtl839x_reg = {
        .write_l2_entry_using_hash = rtl839x_write_l2_entry_using_hash,
        .read_cam = rtl839x_read_cam,
        .write_cam = rtl839x_write_cam,
-       .vlan_port_tag_sts_ctrl = RTL839X_VLAN_PORT_TAG_STS_CTRL,
        .trk_mbr_ctr = rtl839x_trk_mbr_ctr,
        .rma_bpdu_fld_pmask = RTL839X_RMA_BPDU_FLD_PMSK,
        .spcl_trap_eapol_ctrl = RTL839X_SPCL_TRAP_EAPOL_CTRL,
index e89d75d4b9b5c360bd226f4089de491186094f67..5dde8353e2db738e1796f0a89510f3b6dd79895b 100644 (file)
@@ -5,6 +5,22 @@
 
 #include "rtl83xx.h"
 
+#define RTL930X_VLAN_PORT_TAG_STS_INTERNAL                     0x0
+#define RTL930X_VLAN_PORT_TAG_STS_UNTAG                                0x1
+#define RTL930X_VLAN_PORT_TAG_STS_TAGGED                       0x2
+#define RTL930X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED              0x3
+
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_BASE                    0xCE24
+/* port 0-28 */
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL(port) \
+               RTL930X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK       GENMASK(7,6)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK       GENMASK(5,4)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK    GENMASK(3,3)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK    GENMASK(2,2)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK    GENMASK(1,1)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK    GENMASK(0,0)
+
 extern struct mutex smi_lock;
 extern struct rtl83xx_soc_info soc_info;
 
@@ -2300,6 +2316,15 @@ static void rtl930x_packet_cntr_clear(int counter)
        rtl_table_release(r);
 }
 
+void rtl930x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+{
+       sw_w32(FIELD_PREP(RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK,
+                         keep_outer ? RTL930X_VLAN_PORT_TAG_STS_TAGGED : RTL930X_VLAN_PORT_TAG_STS_UNTAG) |
+              FIELD_PREP(RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK,
+                         keep_inner ? RTL930X_VLAN_PORT_TAG_STS_TAGGED : RTL930X_VLAN_PORT_TAG_STS_UNTAG),
+              RTL930X_VLAN_PORT_TAG_STS_CTRL(port));
+}
+
 void rtl930x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
 {
        if (type == PBVLAN_TYPE_INNER)
@@ -2498,7 +2523,7 @@ const struct rtl838x_reg rtl930x_reg = {
        .write_l2_entry_using_hash = rtl930x_write_l2_entry_using_hash,
        .read_cam = rtl930x_read_cam,
        .write_cam = rtl930x_write_cam,
-       .vlan_port_tag_sts_ctrl = RTL930X_VLAN_PORT_TAG_STS_CTRL,
+       .vlan_port_keep_tag_set = rtl930x_vlan_port_keep_tag_set,
        .vlan_port_pvidmode_set = rtl930x_vlan_port_pvidmode_set,
        .vlan_port_pvid_set = rtl930x_vlan_port_pvid_set,
        .trk_mbr_ctr = rtl930x_trk_mbr_ctr,
index 48692ac7eac7fa197b29c4b18335815aebc306f6..ee8d6c2c7379652cccf34e41c10033dbdfae55da 100644 (file)
@@ -3,6 +3,26 @@
 #include <asm/mach-rtl838x/mach-rtl83xx.h>
 #include "rtl83xx.h"
 
+#define RTL931X_VLAN_PORT_TAG_STS_INTERNAL                     0x0
+#define RTL931X_VLAN_PORT_TAG_STS_UNTAG                                0x1
+#define RTL931X_VLAN_PORT_TAG_STS_TAGGED                       0x2
+#define RTL931X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED              0x3
+
+#define RTL931X_VLAN_PORT_TAG_CTRL_BASE                                0x4860
+/* port 0-56 */
+#define RTL931X_VLAN_PORT_TAG_CTRL(port) \
+               RTL931X_VLAN_PORT_TAG_CTRL_BASE + (port << 2)
+#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK                        GENMASK(13,12)
+#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK                        GENMASK(11,10)
+#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_KEEP_MASK               GENMASK(9,9)
+#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_KEEP_MASK               GENMASK(8,8)
+#define RTL931X_VLAN_PORT_TAG_IGR_OTAG_KEEP_MASK               GENMASK(7,7)
+#define RTL931X_VLAN_PORT_TAG_IGR_ITAG_KEEP_MASK               GENMASK(6,6)
+#define RTL931X_VLAN_PORT_TAG_OTPID_IDX_MASK                   GENMASK(5,4)
+#define RTL931X_VLAN_PORT_TAG_OTPID_KEEP_MASK                  GENMASK(3,3)
+#define RTL931X_VLAN_PORT_TAG_ITPID_IDX_MASK                   GENMASK(2,1)
+#define RTL931X_VLAN_PORT_TAG_ITPID_KEEP_MASK                  GENMASK(0,0)
+
 extern struct mutex smi_lock;
 extern struct rtl83xx_soc_info soc_info;
 
@@ -1470,6 +1490,15 @@ int rtl931x_l3_setup(struct rtl838x_switch_priv *priv)
        return 0;
 }
 
+void rtl931x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+{
+       sw_w32(FIELD_PREP(RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK,
+                         keep_outer ? RTL931X_VLAN_PORT_TAG_STS_TAGGED : RTL931X_VLAN_PORT_TAG_STS_UNTAG) |
+              FIELD_PREP(RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK,
+                         keep_inner ? RTL931X_VLAN_PORT_TAG_STS_TAGGED : RTL931X_VLAN_PORT_TAG_STS_UNTAG),
+              RTL931X_VLAN_PORT_TAG_CTRL(port));
+}
+
 void rtl931x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
 {
        if (type == PBVLAN_TYPE_INNER)
@@ -1651,7 +1680,7 @@ const struct rtl838x_reg rtl931x_reg = {
        .write_l2_entry_using_hash = rtl931x_write_l2_entry_using_hash,
        .read_cam = rtl931x_read_cam,
        .write_cam = rtl931x_write_cam,
-       .vlan_port_tag_sts_ctrl = RTL931X_VLAN_PORT_TAG_CTRL,
+       .vlan_port_keep_tag_set = rtl931x_vlan_port_keep_tag_set,
        .vlan_port_pvidmode_set = rtl931x_vlan_port_pvidmode_set,
        .vlan_port_pvid_set = rtl931x_vlan_port_pvid_set,
        .trk_mbr_ctr = rtl931x_trk_mbr_ctr,