ar71xx: register UART for the AR933X SoCs

[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ar71xx / devices.c

diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
index 86107ef3653f36c5976193c58b2437400aca670e..03de1fc6f8180a7e29c17db9f96e6cb1fca1d82c 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c
@@ -21,6 +21,7 @@
 #include <linux/serial_8250.h>
 
 #include <asm/mach-ar71xx/ar71xx.h>
+#include <asm/mach-ar71xx/ar933x_uart_platform.h>
 
 #include "devices.h"
 
@@ -57,8 +58,34 @@ static struct platform_device ar71xx_uart_device = {
        },
 };
 
+static struct resource ar933x_uart_resources[] = {
+       {
+               .start  = AR933X_UART_BASE,
+               .end    = AR933X_UART_BASE + AR71XX_UART_SIZE - 1,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .start  = AR71XX_MISC_IRQ_UART,
+               .end    = AR71XX_MISC_IRQ_UART,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct ar933x_uart_platform_data ar933x_uart_data;
+static struct platform_device ar933x_uart_device = {
+       .name           = "ar933x-uart",
+       .id             = -1,
+       .resource       = ar933x_uart_resources,
+       .num_resources  = ARRAY_SIZE(ar933x_uart_resources),
+       .dev = {
+               .platform_data  = &ar933x_uart_data,
+       },
+};
+
 void __init ar71xx_add_device_uart(void)
 {
+       struct platform_device *pdev;
+
        switch (ar71xx_soc) {
        case AR71XX_SOC_AR7130:
        case AR71XX_SOC_AR7141:
@@ -68,20 +95,28 @@ void __init ar71xx_add_device_uart(void)
        case AR71XX_SOC_AR7242:
        case AR71XX_SOC_AR9130:
        case AR71XX_SOC_AR9132:
+               pdev = &ar71xx_uart_device;
                ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
                break;
 
+       case AR71XX_SOC_AR9330:
+       case AR71XX_SOC_AR9331:
+               pdev = &ar933x_uart_device;
+               ar933x_uart_data.uartclk = ar71xx_ahb_freq;
+               break;
+
        case AR71XX_SOC_AR9341:
        case AR71XX_SOC_AR9342:
        case AR71XX_SOC_AR9344:
+               pdev = &ar71xx_uart_device;
                ar71xx_uart_data[0].uartclk = ar71xx_ref_freq;
                break;
 
        default:
                BUG();
-
        }
-       platform_device_register(&ar71xx_uart_device);
+
+       platform_device_register(pdev);
 }
 
 static struct resource ar71xx_mdio_resources[] = {
@@ -150,6 +185,12 @@ void __init ar71xx_add_device_mdio(u32 phy_mask)
                               AR7242_PLL_REG_ETH0_INT_CLOCK, 0x62000000,
                               AR71XX_ETH0_PLL_SHIFT);
                break;
+       case AR71XX_SOC_AR9330:
+       case AR71XX_SOC_AR9331:
+               ar71xx_mdio_data.is_ar7240 = 1;
+               ar71xx_mdio_resources[0].start = AR71XX_GE1_BASE;
+               ar71xx_mdio_resources[0].end = AR71XX_GE1_BASE + 0x200 - 1;
+               break;
        default:
                break;
        }
@@ -245,6 +286,16 @@ static void ar91xx_set_pll_ge1(int speed)
                         val, AR91XX_ETH1_PLL_SHIFT);
 }
 
+static void ar933x_set_pll_ge0(int speed)
+{
+       /* TODO */
+}
+
+static void ar933x_set_pll_ge1(int speed)
+{
+       /* TODO */
+}
+
 static void ar71xx_ddr_flush_ge0(void)
 {
        ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
@@ -275,6 +326,16 @@ static void ar91xx_ddr_flush_ge1(void)
        ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
 }
 
+static void ar933x_ddr_flush_ge0(void)
+{
+       ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE0);
+}
+
+static void ar933x_ddr_flush_ge1(void)
+{
+       ar71xx_ddr_flush(AR933X_DDR_REG_FLUSH_GE1);
+}
+
 static struct resource ar71xx_eth0_resources[] = {
        {
                .name   = "mac_base",
@@ -357,6 +418,10 @@ struct platform_device ar71xx_eth1_device = {
 #define AR91XX_PLL_VAL_100     0x13000a44
 #define AR91XX_PLL_VAL_10      0x00441099
 
+#define AR933X_PLL_VAL_1000    0x00110000
+#define AR933X_PLL_VAL_100     0x00001099
+#define AR933X_PLL_VAL_10      0x00991099
+
 static void __init ar71xx_init_eth_pll_data(unsigned int id)
 {
        struct ar71xx_eth_pll_data *pll_data;
@@ -401,6 +466,14 @@ static void __init ar71xx_init_eth_pll_data(unsigned int id)
                pll_100 = AR91XX_PLL_VAL_100;
                pll_1000 = AR91XX_PLL_VAL_1000;
                break;
+
+       case AR71XX_SOC_AR9330:
+       case AR71XX_SOC_AR9331:
+               pll_10 = AR933X_PLL_VAL_10;
+               pll_100 = AR933X_PLL_VAL_100;
+               pll_1000 = AR933X_PLL_VAL_1000;
+               break;
+
        default:
                BUG();
        }
@@ -538,6 +611,27 @@ void __init ar71xx_add_device_eth(unsigned int id)
                pdata->has_gbit = 1;
                break;
 
+       case AR71XX_SOC_AR9330:
+       case AR71XX_SOC_AR9331:
+               ar71xx_eth0_data.reset_bit = AR933X_RESET_GE0_MAC |
+                                            AR933X_RESET_GE0_MDIO;
+               ar71xx_eth1_data.reset_bit = AR933X_RESET_GE1_MAC |
+                                            AR933X_RESET_GE1_MDIO;
+               pdata->ddr_flush = id ? ar933x_ddr_flush_ge1
+                                     : ar933x_ddr_flush_ge0;
+               pdata->set_pll =  id ? ar933x_set_pll_ge1
+                                    : ar933x_set_pll_ge0;
+               pdata->has_gbit = 1;
+               pdata->is_ar724x = 1;
+
+               if (!pdata->fifo_cfg1)
+                       pdata->fifo_cfg1 = 0x0010ffff;
+               if (!pdata->fifo_cfg2)
+                       pdata->fifo_cfg2 = 0x015500aa;
+               if (!pdata->fifo_cfg3)
+                       pdata->fifo_cfg3 = 0x01f00140;
+               break;
+
        default:
                BUG();
        }