ar71xx: add support for the wzr-hp-g300nh2

[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-pb92.c

diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c
index e3688954df18c4ce62f73d2bb9384ffc4f95e595..4c5d3ab4a8b97465bd99233f5522524bbee587be 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c
@@ -28,19 +28,19 @@ static struct mtd_partition pb92_partitions[] = {
                .offset         = 0,
                .size           = 0x040000,
                .mask_flags     = MTD_WRITEABLE,
-       } , {
+       }, {
                .name           = "u-boot-env",
                .offset         = 0x040000,
                .size           = 0x010000,
-       } , {
+       }, {
                .name           = "rootfs",
                .offset         = 0x050000,
                .size           = 0x2b0000,
-       } , {
+       }, {
                .name           = "uImage",
                .offset         = 0x300000,
                .size           = 0x0e0000,
-       } , {
+       }, {
                .name           = "ART",
                .offset         = 0x3e0000,
                .size           = 0x020000,
@@ -51,59 +51,53 @@ static struct mtd_partition pb92_partitions[] = {
 
 static struct flash_platform_data pb92_flash_data = {
 #ifdef CONFIG_MTD_PARTITIONS
-        .parts          = pb92_partitions,
-        .nr_parts       = ARRAY_SIZE(pb92_partitions),
+       .parts          = pb92_partitions,
+       .nr_parts       = ARRAY_SIZE(pb92_partitions),
 #endif
 };
 
-
-#define PB92_BUTTONS_POLL_INTERVAL     20
+#define PB92_KEYS_POLL_INTERVAL                20      /* msecs */
+#define PB92_KEYS_DEBOUNCE_INTERVAL    (3 * PB92_KEYS_POLL_INTERVAL)
 
 #define PB92_GPIO_BTN_SW4      8
 #define PB92_GPIO_BTN_SW5      3
 
-static struct gpio_button pb92_gpio_buttons[] __initdata = {
+static struct gpio_keys_button pb92_gpio_keys[] __initdata = {
        {
                .desc           = "sw4",
                .type           = EV_KEY,
                .code           = BTN_0,
-               .threshold      = 3,
+               .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
                .gpio           = PB92_GPIO_BTN_SW4,
                .active_low     = 1,
-       } , {
+       }, {
                .desc           = "sw5",
                .type           = EV_KEY,
                .code           = BTN_1,
-               .threshold      = 3,
+               .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
                .gpio           = PB92_GPIO_BTN_SW5,
                .active_low     = 1,
        }
 };
 
-#define PB92_WAN_PHYMASK       BIT(20)
-#define PB92_LAN_PHYMASK       (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4))
-#define PB92_MDIO_PHYMASK      (PB92_LAN_PHYMASK | PB92_WAN_PHYMASK)
-
 static void __init pb92_init(void)
 {
-       ar71xx_add_device_m25p80(&pb92_flash_data);
+       u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
 
-       ar71xx_add_device_mdio(~PB92_MDIO_PHYMASK);
-
-       ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
-       ar71xx_eth0_data.phy_mask = PB92_WAN_PHYMASK;
+       ar71xx_add_device_m25p80(&pb92_flash_data);
 
-       ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
-       ar71xx_eth1_data.phy_mask = PB92_LAN_PHYMASK;
-       ar71xx_eth1_data.speed = SPEED_1000;
-       ar71xx_eth1_data.duplex = DUPLEX_FULL;
+       ar71xx_add_device_mdio(0, ~BIT(0));
+       ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
+       ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+       ar71xx_eth0_data.speed = SPEED_1000;
+       ar71xx_eth0_data.duplex = DUPLEX_FULL;
+       ar71xx_eth0_data.phy_mask = BIT(0);
 
        ar71xx_add_device_eth(0);
-       ar71xx_add_device_eth(1);
 
-       ar71xx_add_device_gpio_buttons(-1, PB92_BUTTONS_POLL_INTERVAL,
-                                      ARRAY_SIZE(pb92_gpio_buttons),
-                                      pb92_gpio_buttons);
+       ar71xx_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL,
+                                        ARRAY_SIZE(pb92_gpio_keys),
+                                        pb92_gpio_keys);
 
        pb9x_pci_init();
 }