ar71xx: add support for MikroTik hAP ac lite

[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / dev-eth.c

diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
index bdae999d5d42e61b1d94d5908cede7e4b1772103..a8b19b68b2a46545fdd3ed6bdf14006f8a741185 100644 (file)
--- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c
@@ -686,7 +686,6 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
                case ATH79_SOC_AR7241:
                case ATH79_SOC_AR9330:
                case ATH79_SOC_AR9331:
-               case ATH79_SOC_QCA956X:
                case ATH79_SOC_TP9343:
                        pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII;
                        break;
@@ -698,6 +697,7 @@ static int __init ath79_setup_phy_if_mode(unsigned int id,
                case ATH79_SOC_AR9342:
                case ATH79_SOC_AR9344:
                case ATH79_SOC_QCA9533:
+               case ATH79_SOC_QCA956X:
                        switch (pdata->phy_if_mode) {
                        case PHY_INTERFACE_MODE_MII:
                        case PHY_INTERFACE_MODE_GMII:
@@ -814,6 +814,27 @@ void __init ath79_setup_qca955x_eth_cfg(u32 mask)
        iounmap(base);
 }
 
+void __init ath79_setup_qca956x_eth_cfg(u32 mask)
+{
+       void __iomem *base;
+       u32 t;
+
+       base = ioremap(QCA956X_GMAC_BASE, QCA956X_GMAC_SIZE);
+
+       t = __raw_readl(base + QCA956X_GMAC_REG_ETH_CFG);
+
+       t &= ~(QCA956X_ETH_CFG_SW_ONLY_MODE |
+              QCA956X_ETH_CFG_SW_PHY_SWAP);
+
+       t |= mask;
+
+       __raw_writel(t, base + QCA956X_GMAC_REG_ETH_CFG);
+       /* flush write */
+       __raw_readl(base + QCA956X_GMAC_REG_ETH_CFG);
+
+       iounmap(base);
+}
+
 static int ath79_eth_instance __initdata;
 void __init ath79_register_eth(unsigned int id)
 {
@@ -981,7 +1002,6 @@ void __init ath79_register_eth(unsigned int id)
                        pdata->set_speed = ath79_set_speed_dummy;
 
                        pdata->switch_data = &ath79_switch_data;
-                       pdata->use_flow_control = 1;
 
                        /* reset the built-in switch */
                        ath79_device_reset_set(AR934X_RESET_ETH_SWITCH);
@@ -1044,7 +1064,6 @@ void __init ath79_register_eth(unsigned int id)
                        pdata->reset_bit = QCA955X_RESET_GE1_MAC |
                                           QCA955X_RESET_GE1_MDIO;
                        pdata->set_speed = qca955x_set_speed_sgmii;
-                       pdata->use_flow_control = 1;
                }
 
                pdata->has_gbit = 1;
@@ -1077,7 +1096,7 @@ void __init ath79_register_eth(unsigned int id)
                        if (pdata->phy_if_mode == PHY_INTERFACE_MODE_SGMII)
                                pdata->set_speed = qca956x_set_speed_sgmii;
                        else
-                               pdata->set_speed = ath79_set_speed_ge0;
+                               pdata->set_speed = ar934x_set_speed_ge0;
                } else {
                        pdata->reset_bit = QCA955X_RESET_GE1_MAC |
                                           QCA955X_RESET_GE1_MDIO;