ar71xx: rename ethernet pdata->builtin_switch to use_flow_control

[openwrt/openwrt.git] / target / linux / ar71xx / files / drivers / net / ethernet / atheros / ag71xx / ag71xx_main.c

diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
index 265c089eb68a9ae9557cfd7edcf58a9207e1dd60..0ae6acf119907fc362141985b86b6d13064667ed 100644 (file)
--- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
@@ -453,9 +453,12 @@ static void ag71xx_hw_stop(struct ag71xx *ag)
 static void ag71xx_hw_setup(struct ag71xx *ag)
 {
        struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
 static void ag71xx_hw_setup(struct ag71xx *ag)
 {
        struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);

+       u32 init = MAC_CFG1_INIT;

 
        /* setup MAC configuration registers */
 
        /* setup MAC configuration registers */

-       ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
+       if (pdata->use_flow_control)
+               init |= MAC_CFG1_TFC | MAC_CFG1_RFC;
+       ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, init);

 
        ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
                  MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);
 
        ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
                  MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);


@@ -513,14 +516,16 @@ static void ag71xx_fast_reset(struct ag71xx *ag)
        struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
        struct net_device *dev = ag->dev;
        u32 reset_mask = pdata->reset_bit;
        struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
        struct net_device *dev = ag->dev;
        u32 reset_mask = pdata->reset_bit;

-       u32 rx_ds, tx_ds;
+       u32 rx_ds;

        u32 mii_reg;
 
        reset_mask &= AR71XX_RESET_GE0_MAC | AR71XX_RESET_GE1_MAC;
 
        u32 mii_reg;
 
        reset_mask &= AR71XX_RESET_GE0_MAC | AR71XX_RESET_GE1_MAC;
 

+       ag71xx_hw_stop(ag);
+       wmb();
+

        mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG);
        rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC);
        mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG);
        rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC);

-       tx_ds = ag71xx_rr(ag, AG71XX_REG_TX_DESC);

 
        ath79_device_reset_set(reset_mask);
        udelay(10);
 
        ath79_device_reset_set(reset_mask);
        udelay(10);


@@ -530,13 +535,16 @@ static void ag71xx_fast_reset(struct ag71xx *ag)
        ag71xx_dma_reset(ag);
        ag71xx_hw_setup(ag);
        ag71xx_tx_packets(ag, true);
        ag71xx_dma_reset(ag);
        ag71xx_hw_setup(ag);
        ag71xx_tx_packets(ag, true);

+       ag->tx_ring.curr = 0;
+       ag->tx_ring.dirty = 0;
+       netdev_reset_queue(ag->dev);

 
        /* setup max frame length */
        ag71xx_wr(ag, AG71XX_REG_MAC_MFL,
                  ag71xx_max_frame_len(ag->dev->mtu));
 
        ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds);
 
        /* setup max frame length */
        ag71xx_wr(ag, AG71XX_REG_MAC_MFL,
                  ag71xx_max_frame_len(ag->dev->mtu));
 
        ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds);

-       ag71xx_wr(ag, AG71XX_REG_TX_DESC, tx_ds);
+       ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma);

        ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg);
 
        ag71xx_hw_set_macaddr(ag, dev->dev_addr);
        ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg);
 
        ag71xx_hw_set_macaddr(ag, dev->dev_addr);


@@ -962,6 +970,9 @@ static int ag71xx_tx_packets(struct ag71xx *ag, bool flush)
                        break;
                }
 
                        break;
                }
 

+               if (flush)
+                       desc->ctrl |= DESC_EMPTY;
+

                n++;
                if (!skb)
                        continue;
                n++;
                if (!skb)
                        continue;