armsr: armv8: enable serial console for Renesas platforms
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9531_comfast_cf-e5.dts
index d83972525855de2859d50a0da035726a041438d4..ec99ee0c4f5e2a6cafc83084573d7590cb330161 100644 (file)
@@ -4,6 +4,7 @@
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
 
 / {
        compatible = "comfast,cf-e5", "qca,qca9531";
                pinctrl-0 = <&jtag_disable_pins &led_wan_pin>;
 
                wan {
-                       label = "blue:wan";
+                       function = LED_FUNCTION_WAN;
+                       color = <LED_COLOR_ID_BLUE>;
                        gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
                };
 
                lan {
-                       label = "blue:lan";
+                       function = LED_FUNCTION_LAN;
+                       color = <LED_COLOR_ID_BLUE>;
                        gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
                };
 
                wlan {
-                       label = "blue:wlan";
+                       function = LED_FUNCTION_WLAN;
+                       color = <LED_COLOR_ID_BLUE>;
                        gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
                        linux,default-trigger = "phy0tpt";
                };
 };
 
 &usb0 {
-       #address-cells = <1>;
-       #size-cells = <0>;
        status = "okay";
-
-       hub_port: port@1 {
-               reg = <1>;
-               #trigger-source-cells = <0>;
-       };
 };
 
 &usb_phy {
                                label = "art";
                                reg = <0x010000 0x010000>;
                                read-only;
+
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       macaddr_art_0: macaddr@0 {
+                                               reg = <0x0 0x6>;
+                                       };
+
+                                       macaddr_art_6: macaddr@6 {
+                                               reg = <0x6 0x6>;
+                                       };
+                               };
                        };
 
                        partition@20000 {
                pinctrl-single,bits = <0x4 0x0 0xff>;
        };
 };
-
-&art {
-       compatible = "nvmem-cells";
-       #address-cells = <1>;
-       #size-cells = <1>;
-
-       macaddr_art_0: macaddr@0 {
-               reg = <0x0 0x6>;
-       };
-
-       macaddr_art_6: macaddr@6 {
-               reg = <0x6 0x6>;
-       };
-};