ath79: enable UART in SoC DTSI files
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9557_iodata_wn-ac-dgr.dtsi
index 78ee3a39db6be00c297ab0c4159f69a143ccdb53..204a63cda8ddcf48ce02791e15bb5c78688dfcd0 100644 (file)
@@ -1,10 +1,10 @@
 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 
+#include "qca955x.dtsi"
+
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-#include "qca955x.dtsi"
-
 / {
        aliases {
                led-boot = &led_power;
                compatible = "gpio-leds";
 
                led_power: power {
-                       label = "iodata:green:power";
+                       label = "green:power";
                        gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
                        default-state = "on";
                };
 
                eco {
-                       label = "iodata:green:eco";
+                       label = "green:eco";
                        gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
                };
 
                wlan5g {
-                       label = "iodata:green:wlan5g";
+                       label = "green:wlan5g";
                        gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
                        linux,default-trigger = "phy0tpt";
                };
 
                wlan2g {
-                       label = "iodata:green:wlan2g";
+                       label = "green:wlan2g";
                        gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
                        linux,default-trigger = "phy1tpt";
                };
 
                notification {
-                       label = "iodata:amber:notification";
+                       label = "amber:notification";
                        gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
                };
        };
@@ -90,8 +90,6 @@
 &spi {
        status = "okay";
 
-       num-cs = <1>;
-
        flash@0 {
                compatible = "jedec,spi-nor";
                reg = <0>;
        };
 };
 
-&uart {
-       status = "okay";
-};
-
 &usb_phy0 {
        status = "okay";
 };