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ath79: enable UART in SoC DTSI files
[openwrt/openwrt.git]
/
target
/
linux
/
ath79
/
dts
/
qca9558_devolo_dvl1xxx.dtsi
diff --git
a/target/linux/ath79/dts/qca9558_devolo_dvl1xxx.dtsi
b/target/linux/ath79/dts/qca9558_devolo_dvl1xxx.dtsi
index 42b45c590098e09297f89de5c466899118a1a12f..7ae33c3e04e89a622fb54f21369fcc4a9765131f 100644
(file)
--- a/
target/linux/ath79/dts/qca9558_devolo_dvl1xxx.dtsi
+++ b/
target/linux/ath79/dts/qca9558_devolo_dvl1xxx.dtsi
@@
-10,16
+10,12
@@
* antennas and number of spatial streams.
*/
* antennas and number of spatial streams.
*/
+#include "qca955x.dtsi"
+
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
-#include "qca9557.dtsi"
-
/ {
/ {
- chosen {
- bootargs = "console=ttyS0,115200n8";
- };
-
keys {
compatible = "gpio-keys";
keys {
compatible = "gpio-keys";
@@
-44,19
+40,9
@@
status = "okay";
};
status = "okay";
};
-&uart {
- status = "okay";
-};
-
-&gpio {
- status = "okay";
-};
-
&spi {
status = "okay";
&spi {
status = "okay";
- num-cs = <1>;
-
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
@@
-115,34
+101,14
@@
mtd-mac-address = <&art 0x00>;
phy-handle = <&phy4>;
mtd-mac-address = <&art 0x00>;
phy-handle = <&phy4>;
- phy-mode = "rgmii-rxid";
- pll-data = <0xae000000 0x80000101 0x80001313>;
gmac_config: gmac-config {
device = <&gmac>;
gmac_config: gmac-config {
device = <&gmac>;
- rxdv-delay = <3>;
- rxd-delay = <3>;
- txen-delay = <0>;
- txd-delay = <0>;
rgmii-enabled = <1>;
};
};
rgmii-enabled = <1>;
};
};
-&mdio1 {
- phy1: ethernet-phy@1 {
- reg = <1>;
- };
-};
-
-ð1 {
- mtd-mac-address = <&art 0x00>;
- mtd-mac-address-increment = <1>;
-
- phy-handle = <&phy1>;
- pll-data = <0x03000101 0x00000101 0x00001313>;
-};
-
&wmac {
status = "okay";
&wmac {
status = "okay";