ath79: enable UART in SoC DTSI files
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9558_devolo_dvl1xxx.dtsi
index cfd43c8e8a2328c841bb893bdae9b5bab18b18bb..7ae33c3e04e89a622fb54f21369fcc4a9765131f 100644 (file)
  * antennas and number of spatial streams.
  */
 
-/dts-v1/;
+#include "qca955x.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-#include "qca9557.dtsi"
-
 / {
-       chosen {
-               bootargs = "console=ttyS0,115200n8";
-       };
-
        keys {
                compatible = "gpio-keys";
 
        status = "okay";
 };
 
-&uart {
-       status = "okay";
-};
-
-&gpio {
-       status = "okay";
-};
-
 &spi {
        status = "okay";
-       num-cs = <1>;
 
        flash@0 {
                compatible = "jedec,spi-nor";
 
        phy4: ethernet-phy@4 {
                reg = <4>;
-               at803x-disable-smarteee;
+               eee-broken-100tx;
+               eee-broken-1000t;
        };
 };
 
 
        mtd-mac-address = <&art 0x00>;
        phy-handle = <&phy4>;
-       phy-mode = "rgmii-rxid";
-       pll-data = <0xae000000 0x80000101 0x80001313>;
 
        gmac_config: gmac-config {
                device = <&gmac>;
 
-               rxdv-delay = <3>;
-               rxd-delay = <3>;
-               txen-delay = <0>;
-               txd-delay = <0>;
                rgmii-enabled = <1>;
        };
 };
 
-&mdio1 {
-       phy1: ethernet-phy@1 {
-               reg = <1>;
-       };
-};
-
-&eth1 {
-       mtd-mac-address = <&art 0x00>;
-       mtd-mac-address-increment = <1>;
-       phy-handle = <&phy1>;
-       pll-data = <0x03000101 0x00000101 0x00001313>;
-};
-
 &wmac {
        status = "okay";
+
        mtd-cal-data = <&art 0x1000>;
        mtd-mac-address = <&art 0x00>;
        mtd-mac-address-increment = <(-2)>;