atheros[ar2315-wdt]: update interrupt handling

[openwrt/openwrt.git] / target / linux / atheros / patches-3.10 / 100-board.patch

diff --git a/target/linux/atheros/patches-3.10/100-board.patch b/target/linux/atheros/patches-3.10/100-board.patch
index d7bd94a7697e0d8adfa10ba5ce6ddb688d0ad5d2..316982753c448a7a0d9a36e947f4b6c58f3c8f6f 100644 (file)
--- a/target/linux/atheros/patches-3.10/100-board.patch
+++ b/target/linux/atheros/patches-3.10/100-board.patch
@@ -713,7 +713,7 @@
 +#endif /* __ASM_MIPS_MACH_ATHEROS_WAR_H */
 --- /dev/null
 +++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
-@@ -0,0 +1,615 @@
+@@ -0,0 +1,597 @@
 +/*
 + * Register definitions for AR2315+
 + *
@@ -1112,24 +1112,6 @@
 +#define SDRAM_BANKADDR_BITS_S       3
 +
 +/*
-+ * SPI Flash Interface Registers
-+ */
-+
-+#define AR2315_SPI_CTL      (AR2315_SPI + 0x00)
-+#define AR2315_SPI_OPCODE   (AR2315_SPI + 0x04)
-+#define AR2315_SPI_DATA     (AR2315_SPI + 0x08)
-+
-+#define SPI_CTL_START           0x00000100
-+#define SPI_CTL_BUSY            0x00010000
-+#define SPI_CTL_TXCNT_MASK      0x0000000f
-+#define SPI_CTL_RXCNT_MASK      0x000000f0
-+#define SPI_CTL_TX_RX_CNT_MASK  0x000000ff
-+#define SPI_CTL_SIZE_MASK       0x00060000
-+
-+#define SPI_CTL_CLK_SEL_MASK    0x03000000
-+#define SPI_OPCODE_MASK         0x000000ff
-+
-+/*
 + * PCI Bus Interface Registers
 + */
 +#define AR2315_PCI_1MS_REG      (AR2315_PCI + 0x0008)
@@ -2152,7 +2134,7 @@
 +
 --- /dev/null
 +++ b/arch/mips/ar231x/ar2315.c
-@@ -0,0 +1,623 @@
+@@ -0,0 +1,624 @@
 +/*
 + * This file is subject to the terms and conditions of the GNU General Public
 + * License.  See the file "COPYING" in the main directory of this archive
@@ -2252,9 +2234,10 @@
 +                      ar2315_gpio_irq();
 +              else if (misc_intr & AR2315_ISR_UART0)
 +                      do_IRQ(AR531X_MISC_IRQ_UART0);
-+              else if (misc_intr & AR2315_ISR_WD)
++              else if (misc_intr & AR2315_ISR_WD) {
++                      ar231x_write_reg(AR2315_ISR, AR2315_ISR_WD);
 +                      do_IRQ(AR531X_MISC_IRQ_WATCHDOG);
-+              else
++              } else
 +                      do_IRQ(AR531X_MISC_IRQ_NONE);
 +      } else if (pending & CAUSEF_IP7)
 +              do_IRQ(AR531X_IRQ_CPU_CLOCK);
@@ -2536,14 +2519,14 @@
 +
 +static struct platform_device ar2315_spiflash = {
 +      .id = 0,
-+      .name = "spiflash",
++      .name = "ar2315-spiflash",
 +      .resource = ar2315_spiflash_res,
 +      .num_resources = ARRAY_SIZE(ar2315_spiflash_res)
 +};
 +
 +static struct platform_device ar2315_wdt = {
 +      .id = 0,
-+      .name = "ar2315_wdt",
++      .name = "ar2315-wdt",
 +};
 +
 +/*
@@ -2894,13 +2877,13 @@
 +static inline u32
 +ar231x_read_reg(u32 reg)
 +{
-+      return __raw_readl((u32 *)KSEG1ADDR(reg));
++      return __raw_readl((void __iomem *)KSEG1ADDR(reg));
 +}
 +
 +static inline void
 +ar231x_write_reg(u32 reg, u32 val)
 +{
-+      __raw_writel(val, (u32 *)KSEG1ADDR(reg));
++      __raw_writel(val, (void __iomem *)KSEG1ADDR(reg));
 +}
 +
 +static inline u32