kernel: bump kernel 4.4 to 4.4.129 for 17.01

[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.4 / 0263-clk-bcm2835-add-missing-osc-and-per-clocks.patch

diff --git a/target/linux/brcm2708/patches-4.4/0263-clk-bcm2835-add-missing-osc-and-per-clocks.patch b/target/linux/brcm2708/patches-4.4/0263-clk-bcm2835-add-missing-osc-and-per-clocks.patch
index 9c9518e4e5a52be738b46320cc2ac0afab6879b7..5683b04bd5345f27326123705512a7d17b22639a 100644 (file)
--- a/target/linux/brcm2708/patches-4.4/0263-clk-bcm2835-add-missing-osc-and-per-clocks.patch
+++ b/target/linux/brcm2708/patches-4.4/0263-clk-bcm2835-add-missing-osc-and-per-clocks.patch
@@ -26,7 +26,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
  #define CM_EMMCCTL            0x1c0
  #define CM_EMMCDIV            0x1c4
  
-@@ -1616,6 +1618,12 @@ static const struct bcm2835_clk_desc clk
+@@ -1618,6 +1620,12 @@ static const struct bcm2835_clk_desc clk
                .div_reg = CM_TSENSDIV,
                .int_bits = 5,
                .frac_bits = 0),
@@ -39,7 +39,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
  
        /* clocks with vpu parent mux */
        [BCM2835_CLOCK_H264]    = REGISTER_VPU_CLK(
-@@ -1630,6 +1638,7 @@ static const struct bcm2835_clk_desc clk
+@@ -1632,6 +1640,7 @@ static const struct bcm2835_clk_desc clk
                .div_reg = CM_ISPDIV,
                .int_bits = 4,
                .frac_bits = 8),
@@ -47,7 +47,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
        /*
         * Secondary SDRAM clock.  Used for low-voltage modes when the PLL
         * in the SDRAM controller can't be used.
-@@ -1661,6 +1670,36 @@ static const struct bcm2835_clk_desc clk
+@@ -1663,6 +1672,36 @@ static const struct bcm2835_clk_desc clk
                .is_vpu_clock = true),
  
        /* clocks with per parent mux */
@@ -84,7 +84,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
  
        /* Arasan EMMC clock */
        [BCM2835_CLOCK_EMMC]    = REGISTER_PER_CLK(
-@@ -1669,6 +1708,29 @@ static const struct bcm2835_clk_desc clk
+@@ -1671,6 +1710,29 @@ static const struct bcm2835_clk_desc clk
                .div_reg = CM_EMMCDIV,
                .int_bits = 4,
                .frac_bits = 8),
@@ -114,7 +114,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
        /* HDMI state machine */
        [BCM2835_CLOCK_HSM]     = REGISTER_PER_CLK(
                .name = "hsm",
-@@ -1690,12 +1752,26 @@ static const struct bcm2835_clk_desc clk
+@@ -1692,12 +1754,26 @@ static const struct bcm2835_clk_desc clk
                .int_bits = 12,
                .frac_bits = 12,
                .is_mash_clock = true),
@@ -141,7 +141,7 @@ Reviewed-by: Eric Anholt <eric@anholt.net>
        /* TV encoder clock.  Only operating frequency is 108Mhz.  */
        [BCM2835_CLOCK_VEC]     = REGISTER_PER_CLK(
                .name = "vec",
-@@ -1704,6 +1780,20 @@ static const struct bcm2835_clk_desc clk
+@@ -1706,6 +1782,20 @@ static const struct bcm2835_clk_desc clk
                .int_bits = 4,
                .frac_bits = 0),