brcm63xx: implement gpio_to_irq for bcm63xx-gpio

[openwrt/openwrt.git] / target / linux / brcm63xx / dts / bcm6348.dtsi

diff --git a/target/linux/brcm63xx/dts/bcm6348.dtsi b/target/linux/brcm63xx/dts/bcm6348.dtsi
index 404ed334358cd0ebacca6800006d42c7ae4ca402..d1219c031ff472b614021cd3c80d39a18e427d48 100644 (file)
--- a/target/linux/brcm63xx/dts/bcm6348.dtsi
+++ b/target/linux/brcm63xx/dts/bcm6348.dtsi
@@ -5,6 +5,8 @@
 
        aliases {
                pflash = &pflash;
+               gpio0 = &gpio0;
+               gpio1 = &gpio1;
        };
 
        cpus {
@@ -18,6 +20,14 @@
                };
        };
 
+       cpu_intc: interrupt-controller {
+               #address-cells = <0>;
+               compatible = "mti,cpu-interrupt-controller";
+
+               interrupt-controller;
+               #interrupt-cells = <1>;
+       };
+
        memory { device_type = "memory"; reg = <0 0>; };
 
        pflash: nor@1fc00000 {
@@ -35,5 +45,51 @@
                #size-cells = <1>;
                ranges;
                compatible = "simple-bus";
+
+               periph_intc: interrupt-controller@fffe000c {
+                       compatible = "brcm,bcm6345-l1-intc";
+                       reg = <0xfffe000c 0x8>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+
+                       interrupt-parent = <&cpu_intc>;
+                       interrupts = <2>;
+               };
+
+               ext_intc: interrupt-controller@fffe0014 {
+                       compatible = "brcm,bcm6345-ext-intc";
+                       reg = <0xfffe0014 0x4>;
+
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
+
+                       interrupt-parent = <&cpu_intc>;
+                       interrupts = <3>, <4>, <5>, <6>;
+
+                       brcm,field-width = <5>;
+               };
+
+               gpio1: gpio-controller@fffe0400 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0xfffe0400 4>, <0xfffe0408 4>;
+
+                       gpio-controller;
+                       #gpio-cells = <2>;
+
+                       ngpios = <5>;
+
+                       interrupt-parent = <&ext_intc>;
+                       interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
+                       interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3";
+               };
+
+               gpio0: gpio-controller@fffe0404 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0xfffe0404 4>, <0xfffe040c 4>;
+
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
        };
 };