kernel: bump 5.10 to 5.10.94

[openwrt/openwrt.git] / target / linux / generic / pending-5.10 / 850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch

diff --git a/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch b/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch
index c6d964eaa905e01330e7503b5d2a0e3685227f15..fecd19166cab8c62d64156d394c9ef01c8dfbd54 100644 (file)
--- a/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch
+++ b/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch
@@ -29,12 +29,12 @@ Signed-off-by: Marek Behún <kabel@kernel.org>
  /* PIO registers base address and register offsets */
  #define PIO_BASE_ADDR                         0x4000
  #define PIO_CTRL                              (PIO_BASE_ADDR + 0x0)
-@@ -967,7 +963,7 @@ static int advk_sw_pci_bridge_init(struc
+@@ -966,7 +962,7 @@ static int advk_sw_pci_bridge_init(struc
        bridge->conf.pref_mem_limit = cpu_to_le16(PCI_PREF_RANGE_TYPE_64);
  
        /* Support interrupt A for MSI feature */
 -      bridge->conf.intpin = PCIE_CORE_INT_A_ASSERT_ENABLE;
 +      bridge->conf.intpin = PCI_INTERRUPT_INTA;
  
-       /* Indicates supports for Completion Retry Status */
-       bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS);
+       /* Aardvark HW provides PCIe Capability structure in version 2 */
+       bridge->pcie_conf.cap = cpu_to_le16(2);