-From 0f669e10ede7f06bb998373de6a9d169f47fcc66 Mon Sep 17 00:00:00 2001
+From 75f4d8d10e016f7428c268424483a927ee7a78bb Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@armlinux.org.uk>
-Date: Tue, 5 Nov 2019 11:54:30 +0000
-Subject: [PATCH 655/660] net: phy: add Broadcom BCM84881 PHY driver
+Date: Wed, 11 Dec 2019 10:56:56 +0000
+Subject: [PATCH] net: phy: add Broadcom BCM84881 PHY driver
Add a rudimentary Clause 45 driver for the BCM84881 PHY, found on
Methode DM7052 SFPs.
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: David S. Miller <davem@davemloft.net>
---
- drivers/net/phy/Kconfig | 5 +
+ drivers/net/phy/Kconfig | 6 +
drivers/net/phy/Makefile | 1 +
- drivers/net/phy/bcm84881.c | 290 +++++++++++++++++++++++++++++++++++++
- 3 files changed, 296 insertions(+)
+ drivers/net/phy/bcm84881.c | 269 +++++++++++++++++++++++++++++++++++++
+ 3 files changed, 276 insertions(+)
create mode 100644 drivers/net/phy/bcm84881.c
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
-@@ -280,6 +280,11 @@ config BROADCOM_PHY
+@@ -329,6 +329,12 @@ config BROADCOM_PHY
Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
BCM5481, BCM54810 and BCM5482 PHYs.
+config BCM84881_PHY
+ tristate "Broadcom BCM84881 PHY"
++ depends on PHYLIB
+ ---help---
+ Support the Broadcom BCM84881 PHY.
+
---help---
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
-@@ -54,6 +54,7 @@ obj-$(CONFIG_BCM87XX_PHY) += bcm87xx.o
+@@ -62,6 +62,7 @@ obj-$(CONFIG_BCM87XX_PHY) += bcm87xx.o
obj-$(CONFIG_BCM_CYGNUS_PHY) += bcm-cygnus.o
obj-$(CONFIG_BCM_NET_PHYLIB) += bcm-phy-lib.o
obj-$(CONFIG_BROADCOM_PHY) += broadcom.o
obj-$(CONFIG_DAVICOM_PHY) += davicom.o
--- /dev/null
+++ b/drivers/net/phy/bcm84881.c
-@@ -0,0 +1,290 @@
+@@ -0,0 +1,269 @@
+// SPDX-License-Identifier: GPL-2.0
+// Broadcom BCM84881 NBASE-T PHY driver, as found on a SFP+ module.
+// Copyright (C) 2019 Russell King, Deep Blue Solutions Ltd.
+ return 0;
+}
+
-+static int genphy_c45_an_config_aneg(struct phy_device *phydev)
++static int bcm84881_get_features(struct phy_device *phydev)
+{
-+ bool changed = false;
-+ u32 advertising;
+ int ret;
+
-+ phydev->advertising &= phydev->supported;
-+ advertising = phydev->advertising;
-+
-+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_ADVERTISE,
-+ ADVERTISE_ALL | ADVERTISE_100BASE4 |
-+ ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM,
-+ ethtool_adv_to_mii_adv_t(advertising));
-+ if (ret < 0)
++ ret = genphy_c45_pma_read_abilities(phydev);
++ if (ret)
+ return ret;
-+ if (ret > 0)
-+ changed = true;
+
-+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
-+ MDIO_AN_10GBT_CTRL_ADV10G,
-+ advertising & ADVERTISED_10000baseT_Full ?
-+ MDIO_AN_10GBT_CTRL_ADV10G : 0);
-+ if (ret < 0)
-+ return ret;
-+ if (ret > 0)
-+ changed = true;
++ /* Although the PHY sets bit 1.11.8, it does not support 10M modes */
++ linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT,
++ phydev->supported);
++ linkmode_clear_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT,
++ phydev->supported);
+
-+ return genphy_c45_check_and_restart_aneg(phydev, changed);
++ return 0;
+}
+
+static int bcm84881_config_aneg(struct phy_device *phydev)
+ if (ret > 0)
+ changed = true;
+
-+ adv = ethtool_adv_to_mii_ctrl1000_t(phydev->advertising);
++ adv = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN,
+ MDIO_AN_C22 + MII_CTRL1000,
+ ADVERTISE_1000FULL | ADVERTISE_1000HALF,
+
+static int bcm84881_read_status(struct phy_device *phydev)
+{
-+ bool autoneg_complete;
+ unsigned int mode;
+ int bmsr, val;
+
+ if (bmsr < 0)
+ return val;
+
-+ autoneg_complete = !!(val & MDIO_AN_STAT1_COMPLETE) &&
-+ !!(bmsr & BMSR_ANEGCOMPLETE);
++ phydev->autoneg_complete = !!(val & MDIO_AN_STAT1_COMPLETE) &&
++ !!(bmsr & BMSR_ANEGCOMPLETE);
+ phydev->link = !!(val & MDIO_STAT1_LSTATUS) &&
+ !!(bmsr & BMSR_LSTATUS);
-+ if (phydev->autoneg == AUTONEG_ENABLE && !autoneg_complete)
++ if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
+ phydev->link = false;
+
+ if (!phydev->link)
+ return 0;
+
-+ phydev->lp_advertising = 0;
++ linkmode_zero(phydev->lp_advertising);
+ phydev->speed = SPEED_UNKNOWN;
+ phydev->duplex = DUPLEX_UNKNOWN;
+ phydev->pause = 0;
+ phydev->asym_pause = 0;
+ phydev->mdix = 0;
+
-+ if (autoneg_complete) {
++ if (phydev->autoneg_complete) {
+ val = genphy_c45_read_lpa(phydev);
+ if (val < 0)
+ return val;
+ if (val < 0)
+ return val;
+
-+ phydev->lp_advertising |= mii_stat1000_to_ethtool_lpa_t(val);
++ mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, val);
+
+ if (phydev->autoneg == AUTONEG_ENABLE)
+ phy_resolve_aneg_linkmode(phydev);
+ .phy_id = 0xae025150,
+ .phy_id_mask = 0xfffffff0,
+ .name = "Broadcom BCM84881",
-+ .features = SUPPORTED_100baseT_Full |
-+ SUPPORTED_100baseT_Half |
-+ SUPPORTED_1000baseT_Full |
-+ SUPPORTED_Autoneg |
-+ SUPPORTED_TP |
-+ SUPPORTED_FIBRE |
-+ SUPPORTED_10000baseT_Full |
-+ SUPPORTED_Backplane,
+ .config_init = bcm84881_config_init,
+ .probe = bcm84881_probe,
++ .get_features = bcm84881_get_features,
+ .config_aneg = bcm84881_config_aneg,
+ .aneg_done = bcm84881_aneg_done,
+ .read_status = bcm84881_read_status,
projects / openwrt / openwrt.git / blobdiff