kernel: bump 4.14 to 4.14.48 for 18.06

[openwrt/openwrt.git] / target / linux / ipq806x / patches-4.14 / 0071-6-PCI-qcom-Force-GEN1-support.patch

diff --git a/target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch b/target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch
index f623532bdb7ecf9697c34e4538498dad5f994b75..5dea084bfa8c6556941e9896f737382de966de08 100644 (file)
--- a/target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch
+++ b/target/linux/ipq806x/patches-4.14/0071-6-PCI-qcom-Force-GEN1-support.patch
@@ -14,48 +14,48 @@ Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
 @@ -129,6 +129,8 @@
  #define PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE    0x358
  #define SLV_ADDR_SPACE_SZ                     0x10000000
-
+ 
 +#define PCIE20_LNK_CONTROL2_LINK_STATUS2        0xA0
 +
  struct qcom_pcie_resources_2_1_0 {
-       struct clk *iface_clk;
-       struct clk *core_clk;
-@@ -218,6 +220,7 @@
-       struct phy *phy;
-       struct gpio_desc *reset;
-       struct qcom_pcie_ops *ops;
+       struct clk *iface_clk;
+       struct clk *core_clk;
+@@ -218,6 +220,7 @@ struct qcom_pcie {
+       struct phy *phy;
+       struct gpio_desc *reset;
+       struct qcom_pcie_ops *ops;
 +      uint32_t force_gen1;
  };
-
+ 
  #define to_qcom_pcie(x)               dev_get_drvdata((x)->dev)
-@@ -532,6 +535,11 @@
-
-       /* wait for clock acquisition */
-       usleep_range(1000, 1500);
+@@ -532,6 +535,11 @@ static int qcom_pcie_init_2_1_0(struct q
+ 
+       /* wait for clock acquisition */
+       usleep_range(1000, 1500);
 +      if (pcie->force_gen1) {
 +              writel_relaxed((readl_relaxed(
 +                      pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2) | 1),
 +                      pcie->pci->dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2);
 +      }
-
-
-       /* Set the Max TLP size to 2K, instead of using default of 4K */
-@@ -1382,6 +1390,8 @@
-       struct dw_pcie *pci;
-       struct qcom_pcie *pcie;
-       int ret;
+ 
+ 
+       /* Set the Max TLP size to 2K, instead of using default of 4K */
+@@ -1382,6 +1390,8 @@ static int qcom_pcie_probe(struct platfo
+       struct dw_pcie *pci;
+       struct qcom_pcie *pcie;
+       int ret;
 +      uint32_t force_gen1 = 0;
 +      struct device_node *np = pdev->dev.of_node;
-
-       pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
-       if (!pcie)
-@@ -1403,6 +1413,9 @@
-       if (IS_ERR(pcie->reset))
-               return PTR_ERR(pcie->reset);
-
+ 
+       pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
+       if (!pcie)
+@@ -1403,6 +1413,9 @@ static int qcom_pcie_probe(struct platfo
+       if (IS_ERR(pcie->reset))
+               return PTR_ERR(pcie->reset);
+ 
 +      of_property_read_u32(np, "force_gen1", &force_gen1);
 +      pcie->force_gen1 = force_gen1;
 +
-       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf");
-       pcie->parf = devm_ioremap_resource(dev, res);
-       if (IS_ERR(pcie->parf))
+       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf");
+       pcie->parf = devm_ioremap_resource(dev, res);
+       if (IS_ERR(pcie->parf))