lantiq: set port numbers corresponding to reg value

[openwrt/openwrt.git] / target / linux / lantiq / files-5.4 / arch / mips / boot / dts / lantiq / vr9_arcadyan_arv7519rw22.dts

diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts
index d6c521cfe7e0f9132fc24cd583f48344d71d4191..793818471973c307e29d7311440f66e73225f18c 100644 (file)
--- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts
+++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts
@@ -110,29 +110,29 @@
                        phy-mode = "rgmii";
                        phy-handle = <&phy0>;
                };
-               ethernet@1 {
-                       compatible = "lantiq,xrx200-pdi-port";
-                       reg = <4>;
-                       phy-mode = "mii";
-                       phy-handle = <&phy13>;
-               };
                ethernet@2 {
                        compatible = "lantiq,xrx200-pdi-port";
-                       reg = <5>;
+                       reg = <2>;
                        phy-mode = "mii";
-                       phy-handle = <&phy14>;
+                       phy-handle = <&phy11>;
                };
                ethernet@3 {
                        compatible = "lantiq,xrx200-pdi-port";
-                       reg = <2>;
+                       reg = <3>;
                        phy-mode = "mii";
-                       phy-handle = <&phy11>;
+                       phy-handle = <&phy12>;
                };
                ethernet@4 {
                        compatible = "lantiq,xrx200-pdi-port";
-                       reg = <3>;
+                       reg = <4>;
                        phy-mode = "mii";
-                       phy-handle = <&phy12>;
+                       phy-handle = <&phy13>;
+               };
+               ethernet@5 {
+                       compatible = "lantiq,xrx200-pdi-port";
+                       reg = <5>;
+                       phy-mode = "mii";
+                       phy-handle = <&phy14>;
                };
        };